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Travelled to:
1 × Australia
1 × China
1 × France
1 × Ireland
1 × Switzerland
1 × The Netherlands
1 × Turkey
17 × USA
2 × United Kingdom
3 × Germany
Collaborated with:
L.T.Pileggi W.Dong S.Zdancewic X.Ye P.Mukherjee X.Li H.Lin L.Yin Z.Feng L.Toderick G.Yu Y.Xu Y.Zhan B.Wang K.L.Chan E.Wohlstadter W.Shi J.Cong P.Zhang W.Jin C.S.Amin C.J.Myers W.Gao K.Darwish T.Xu B.Yan Y.Kim Y.Zhang G.M.Huang P.J.L.II W.Fang X.Yang K.Cao R.Wang J.Tian B.Xiao W.Dietz J.Regehr V.S.Adve J.D.Buhler K.Agrawal R.D.Chamberlain G.P.Fang R.Burt Y.Cui Z.Zeng S.Hu Q.Li J.Hu S.Biswas R.D.(.Blanton L.T.Pileggi S.M.Krishnan Y.Gao S.Marlow S.L.P.Jones A.P.Tolmach Y.Wang C.Zhang G.Zhang H.Wang X.Chen S.Huang Y.Mizukami K.Tadamura J.Warrell S.Prince F.Liu S.R.Nassif P.Gopalakrishnan X.Lu H.Ma S.Wang A.Xu G.Li G.Sawaya G.Gopalakrishnan I.Ghosh S.P.Rajan J.Nie Z.Shi B.He X.Tao X.Liu S.Zhou A.Dingler S.Kurtz M.T.Niemier X.S.Hu G.Csaba J.Nahas W.Porod G.H.Bernstein V.K.Sankar Z.Wang X.Yin Y.Xiang R.Zhu S.Gao X.Wu S.Liu S.Gao L.Zhou
Talks about:
circuit (10) model (10) analysi (9) analog (7) simul (7) base (7) system (6) effici (6) power (6) network (5)

Person: Peng Li

DBLP DBLP: Li:Peng

Contributed to:

DAC 20142014
SIGIR 20142014
DAC 20132013
CIKM 20122012
DAC 20122012
ICSE 20122012
PPoPP 20122012
CIKM 20112011
DAC 20112011
ECIR 20112011
SIGITE 20112011
DAC 20102010
ICPR 20102010
SIGITE 20102010
DAC 20092009
SIGITE 20092009
TestCom/FATES 20092009
DAC 20082008
ICSE 20082008
DAC 20072007
PLDI 20072007
DAC 20062006
ICPR v1 20062006
DAC 20052005
DATE 20052005
POPL 20052005
DAC 20042004
ICPR v3 20042004
LCTES 20042004
DAC 20032003
DATE 20032003
DATE 20022002
Haskell 20072007

Wrote 53 papers:

DAC-2014-CongLXZ #architecture #clustering #reuse
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers (JC, PL, BX, PZ), p. 6.
DAC-2014-LinL #analysis #parallel #reachability #verification
Parallel Hierarchical Reachability Analysis for Analog Verification (HL, PL), p. 6.
DAC-2014-MukherjeeAL #approximate
Approximate property checking of mixed-signal circuits (PM, CSA, PL), p. 6.
DAC-2014-MukherjeeL
Leveraging pre-silicon data to diagnose out-of-specification failures in mixed-signal circuits (PM, PL), p. 6.
SIGIR-2014-LuLMWXW #interactive #microblog #recommendation #topic
Computing and applying topic-level user interactions in microblog recommendation (XL, PL, HM, SW, AX, BW), pp. 843–846.
DAC-2013-LinLM #analysis #hybrid #kernel #reachability #verification
Verification of digitally-intensive analog circuits via kernel ridge regression and hybrid reachability analysis (HL, PL, CJM), p. 6.
DAC-2013-WangLZZC #array #clustering #memory management #multi #synthesis
Memory partitioning for multidimensional arrays in high-level synthesis (YW, PL, PZ, CZ, JC), p. 8.
CIKM-2012-GaoLD #modelling #social #social media #summary #topic
Joint topic modeling for event summarization across news and social media streams (WG, PL, KD), pp. 1173–1182.
DAC-2012-DinglerKNHCNPBLS #logic
Making non-volatile nanomagnet logic non-volatile (AD, SK, MTN, XSH, GC, JN, WP, GHB, PL, VKS), pp. 476–485.
DAC-2012-ZhangWCHL #fine-grained #multi #performance
Heterogeneous multi-channel: fine-grained DRAM control for both system performance and power efficiency (GZ, HW, XC, SH, PL), pp. 876–881.
ICSE-2012-DietzLRA #c #c++ #comprehension #integer
Understanding integer overflow in C/C++ (WD, PL, JR, VSA), pp. 760–770.
PPoPP-2012-BuhlerALC #concurrent #performance #streaming
Efficient deadlock avoidance for streaming computation with filtering (JDB, KA, PL, RDC), pp. 235–246.
PPoPP-2012-LiLSGGR #generative #named #testing #verification
GKLEE: concolic verification and test generation for GPUs (GL, PL, GS, GG, IG, SPR), pp. 215–224.
CIKM-2011-LiWJNSH #categorisation #information retrieval #social
Exploring categorization property of social annotations for information retrieval (PL, BW, WJ, JYN, ZS, BH), pp. 557–562.
DAC-2011-MukherjeeFBL #automation #linear #scalability
Automatic stability checking for large linear analog integrated circuits (PM, GPF, RB, PL), pp. 304–309.
DAC-2011-XuLY #design #power management
Decoupling for power gating: sources of power noise and design strategies (TX, PL, BY), pp. 1002–1007.
DAC-2011-YinKL #effectiveness
High effective-resolution built-in jitter characterization with quantization noise shaping (LY, YK, PL), pp. 765–770.
ECIR-2011-LiWJC #clustering #documentation #web
User-Related Tag Expansion for Web Document Clustering (PL, BW, WJ, YC), pp. 19–31.
SIGITE-2011-Li #concept #framework #open source #using
Introducing virtualization management concepts using open source cloud infrastructure managers (PL), pp. 309–310.
DAC-2010-YeL #modelling #optimisation #parallel #performance #runtime #simulation
Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation (XY, PL), pp. 561–566.
DAC-2010-YinL #low cost #monitoring
Exploiting reconfigurability for low-cost in-situ test and monitoring of digital PLLs (LY, PL), pp. 929–934.
DAC-2010-ZengYFL #analysis #network #optimisation #power management #trade-off
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation (ZZ, XY, ZF, PL), pp. 831–836.
DAC-2010-ZhangLH #analysis
Separatrices in high-dimensional state space: system-theoretical tangent computation and application to SRAM dynamic stability analysis (YZ, PL, GMH), pp. 567–572.
ICPR-2010-MizukamiTWLP #database #implementation #pattern matching #pattern recognition #recognition
CUDA Implementation of Deformable Pattern Recognition and its Application to MNIST Handwritten Digit Database (YM, KT, JW, PL, SP), pp. 2001–2004.
ICPR-2010-TaoYCWLT #2d #estimation #fourier
Estimation of Fingerprint Orientation Field by Weighted 2D Fourier Expansion Model (XT, XY, KC, RW, PL, JT), pp. 1253–1256.
ICPR-2010-WangYLZLCT #distance #novel
A Novel Fingerprint Template Protection Scheme Based on Distance Projection Coding (RW, XY, XL, SZ, PL, KC, JT), pp. 886–889.
SIGITE-2010-LiT #implementation
Cloud in cloud: approaches and implementations (PL, LT), pp. 105–110.
DAC-2009-DongL #integration #performance #simulation
Parallelizable stable explicit numerical integration for efficient circuit simulation (WD, PL), pp. 382–385.
SIGITE-2009-LiTL #education
Experiencing virtual computing lab in information technology education (PL, LT, PJLI), pp. 55–59.
TestCom-FATES-2009-WangYXZGWLGZL #consistency #mobile #network #testing
TTCN-3 Based Conformance Testing of Mobile Broadcast Business Management System in 3G Networks (ZW, XY, YX, RZ, SG, XW, SL, SG, LZ, PL), pp. 163–178.
DAC-2008-DongLY #manycore #named #parallel #simulation
WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines (WD, PL, XY), pp. 238–243.
ICSE-2008-LiW #maintenance #user interface
Dynamic round-trip GUI maintenance (PL, EW), pp. 851–854.
DAC-2007-DongL #performance #simulation #using
Accelerating Harmonic Balance Simulation Using Efficient Parallelizable Hierarchical Preconditioning (WD, PL), pp. 436–439.
DAC-2007-FengLZ #analysis #higher-order #parametricity #performance #reduction #statistics #using
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction (ZF, PL, YZ), pp. 244–249.
DAC-2007-YeZL #optimisation #performance #power management #statistics #using
Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization (XY, YZ, PL), pp. 853–858.
DAC-2007-YuDFL #analysis #framework #nondeterminism #process #statistics
A Framework for Accounting for Process Model Uncertainty in Statistical Static Timing Analysis (GY, WD, ZF, PL), pp. 829–834.
PLDI-2007-LiZ #concurrent #evaluation #implementation #monad #network #scalability #thread
Combining events and threads for scalable network services implementation and evaluation of monadic, application-level concurrency primitives (PL, SZ), pp. 189–199.
DAC-2006-HuLHL #network
Steiner network construction for timing critical nets (SH, QL, JH, PL), pp. 379–384.
DAC-2006-LiS #linear #network #order #reduction
Model order reduction of linear networks with massive ports via frequency-dependent port packing (PL, WS), pp. 267–272.
DAC-2006-YuL #modelling #simulation #statistics
Lookup table based simulation and statistical modeling of Sigma-Delta ADCs (GY, PL), pp. 1035–1040.
ICPR-v1-2006-LiCF #hybrid #kernel #set
Hybrid Kernel Machine Ensemble for Imbalanced Data Sets (PL, KLC, WF), pp. 1108–1111.
DAC-2005-Li #analysis #grid #performance #power management #simulation
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation (PL), pp. 664–669.
DATE-2005-BiswasLBP #specification
Specification Test Compaction for Analog Circuits and MEMS (SB, PL, RD(B, LTP), pp. 164–169.
DATE-2005-LiLLPN #modelling #order #parametricity #performance #reduction #using #variability
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction (PL, FL, XL, LTP, SRN), pp. 958–963.
POPL-2005-LiZ #policy
Downgrading policies and relaxed noninterference (PL, SZ), pp. 158–170.
DAC-2004-LiXLGP #approach #simulation
A frequency relaxation approach for analog/RF system-level simulation (XL, YX, PL, PG, LTP), pp. 842–847.
ICPR-v3-2004-LiCKG #classification #detection #image
Detecting Abnormal Regions in Colonoscopic Images by Patch-based Classifier Ensemble (PL, KLC, SMK, YG), pp. 774–777.
LCTES-2004-LiZ #control flow #java #programming
Advanced control flow in Java card programming (PL, SZ), pp. 165–174.
DAC-2003-LiLXP #analysis #megamodelling
Analog and RF circuit macromodels for system-level analysis (XL, PL, YX, LTP), pp. 478–483.
DAC-2003-LiP #named #order #reduction
NORM: compact model order reduction of weakly nonlinear systems (PL, LTP), pp. 472–477.
DATE-2003-XuLLP #megamodelling
Noise Macromodel for Radio Frequency Integrated Circuits (YX, XL, PL, LTP), pp. 10150–10155.
DATE-2002-LiP #analysis #approach #modelling
A Linear-Centric Modeling Approach to Harmonic Balance Analysis (PL, LTP), pp. 634–639.
Haskell-2007-LiMJT #concurrent #haskell #lightweight
Lightweight concurrency primitives for GHC (PL, SM, SLPJ, APT), pp. 107–118.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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