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Travelled to:
2 × France
2 × Germany
3 × USA
Collaborated with:
I.Bolsens S.Donnay P.Schaumont S.Vernalde P.Wambacq R.Cmar L.Rijnders P.Dobrovolný M.Badaroglu M.v.Heijningen H.D.Man G.Vandersteen Y.Rolain P.Wauters R.Lauwereins J.A.Peperstraete H.Ziad J.Schoukens V.Gravot G.G.E.Gielen
Talks about:
high (5) level (4) transceiv (3) circuit (3) simul (3) rate (3) nois (3) substrat (2) dataflow (2) generat (2)

Person: Marc Engels

DBLP DBLP: Engels:Marc

Contributed to:

DATE 20012001
DAC 20002000
DATE 20002000
DAC 19991999
DATE 19991999
DAC 19981998
ED&TC 19971997
PDP 19961996

Wrote 11 papers:

DATE-2001-BadarogluHGDMGEB #generative #multi #scalability #simulation
High-level simulation of substrate noise generation from large digital circuits with multiple supplies (MB, MvH, VG, SD, HDM, GGEG, ME, IB), pp. 326–330.
DATE-2001-VandersteenWRSDEB #estimation #multi #performance
Efficient bit-error-rate estimation of multicarrier transceivers (GV, PW, YR, JS, SD, ME, IB), pp. 164–168.
DAC-2000-HeijningenBDEB #generative #power management #simulation
High-level simulation of substrate noise generation including power supply noise coupling (MvH, MB, SD, ME, IB), pp. 446–451.
DAC-2000-VandersteenWRDDEB #data flow #performance #simulation
A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers (GV, PW, YR, PD, SD, ME, IB), pp. 440–445.
DATE-2000-WambacqDDEB #communication #modelling
Compact Modeling of Nonlinear Distortion in Analog Communication Circuits (PW, PD, SD, ME, IB), pp. 350–354.
DAC-1999-SchaumontCVE #automation
A 10 Mbit/s Upstream Cable Modem with Automatic equalization (PS, RC, SV, ME), pp. 337–340.
DAC-1999-SchaumontCVEB #behaviour #hardware #reuse
Hardware Reuse at the Behavioral Level (PS, RC, SV, ME, IB), pp. 784–789.
A Single-Package Solution for Wireless Transceivers (PW, SD, HZ, ME, HDM, IB), p. 425–?.
DAC-1998-SchaumontVREB #design #programming
A Programming Environment for the Design of Complex High Speed ASICs (PS, SV, LR, ME, IB), pp. 315–320.
EDTC-1997-SchaumontVREB #multi #synthesis
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications (PS, SV, LR, ME, IB), pp. 542–546.
PDP-1996-WautersELP #data flow
Cyclo-Dynamic Dataflow (PW, ME, RL, JAP), pp. 319–326.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.