Travelled to:1 × Austria
1 × USA
2 × Germany
Collaborated with:M.Besana B.Gupta A.Ferrari R.Guerrieri A.Capello U.Rossi J.Lambert I.Moussa F.Fummi G.Pravadelli L.Cali G.D.Sandre B.Forét D.Iezzi F.Lertora G.Muzzi M.Pasotti M.Poles P.L.Rolandi
Talks about:reconfigur (3) design (2) architectur (1) multimedia (1) methodolog (1) processor (1) platform (1) approach (1) process (1) hardwar (1)
Person: Michele Borgatti
DBLP: Borgatti:Michele
Contributed to:
2004
20032003
1996Wrote 5 papers:
- DATE-2005-BorgattiCRLMFP04 #configuration management #design #multi #verification
- An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems (MB, AC, UR, JLL, IM, FF, GP), pp. 266–271.
- DAC-2003-BorgattiCSFILMPPR #configuration management #embedded #memory management #multi
- A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory (MB, LC, GDS, BF, DI, FL, GM, MP, MP, PLR), pp. 691–695.
- DATE-2003-BesanaB #automation #case study #code generation #design #framework #hardware #platform
- Application Mapping to a Hardware Platform through Automated Code Generation Targeting a RTOS: A Design Case Study (MB, MB), pp. 20041–20044.
- DATE-2003-GuptaB #architecture
- Different Approaches to Add Reconfigurability in a SoC Architecture (BG, MB), p. 10398.
- ICPR-1996-FerrariBG #array #classification
- A VLSI array processor accelerator for k-NN classification (AF, MB, RG), pp. 723–727.