Travelled to:1 × Germany
1 × USA
Collaborated with:L.Ye F.Chang P.Feldmann R.Chadha F.Cano J.Byler K.Nazifi V.Puvvada T.Saito A.Gibbons S.Balajee J.C.Rey J.Kawa R.C.Aitken C.Lütkemeyer V.Pitchumani A.J.Strojwas S.Trimberger
Talks about:design (2) submicron (1) variabl (1) problem (1) parasit (1) effect (1) verif (1) ultra (1) power (1) level (1)
Person: Nagaraj Ns
DBLP: Ns:Nagaraj
Contributed to:
2010
1999Wrote 3 papers:
- DAC-2010-NSRKALPST #problem #question #variability
- Who solves the variability problem? (NN, JCR, JK, RCA, CL, VP, AJS, ST), pp. 218–219.
- DAC-2010-NsBNPSGB #design #future of #power management #question #what
- What’s cool for the future of ultra low power designs? (NN, JB, KN, VP, TS, AG, SB), pp. 523–524.
- DATE-1999-YeCFCNC #design #verification
- Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs (LY, FCC, PF, RC, NN, FC), pp. 658–663.