Travelled to:2 × France
3 × USA
6 × Germany
Collaborated with:P.P.Chakrabarti S.Das A.Banerjee K.Banerjee S.Mitra A.Chakrabarti P.Basu M.G.Dixit S.Ramesh R.Mohanty S.Mukherjee A.Ain S.K.Panda R.Mukhopadhyay B.Pal A.Kumar A.Nandi S.Krishna A.Hazra A.Pal D.Bagchi K.Guha C.R.Mohan L.Fix
Talks about:formal (6) time (4) generat (3) specif (3) intent (3) verif (3) model (3) real (3) architectur (2) coverag (2)
Person: Pallab Dasgupta
DBLP: Dasgupta:Pallab
Contributed to:
20142012
201020102009200620062006200420022001Wrote 11 papers:
- DATE-2014-BanerjeeD #calculus #constraints #generative #random #realtime #sequence
- Acceptance and random generation of event sequences under real time calculus constraints (KB, PD), pp. 1–6.
- DATE-2012-MitraBD #formal method #mining #ranking
- Formal methods for ranking counterexamples through assumption mining (SM, AB, PD), pp. 911–916.
- DAC-2010-HazraMDPBG #architecture #modelling #verification
- Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent (AH, SM, PD, AP, DB, KG), pp. 773–776.
- DATE-2010-DixitDR #component #embedded #realtime
- Taming the component timing: A CBD methodology for real-time embedded systems (MGD, PD, SR), pp. 1649–1652.
- DATE-2009-MukherjeeAPMD #approach #behaviour #formal method #generative
- A formal approach for specification-driven AMS behavioral model generation (SM, AA, SKP, RM, PD), pp. 1512–1517.
- DAC-2006-BanerjeePDKD #game studies #generative #specification #testing
- Test generation games from formal specifications (AB, BP, SD, AK, PD), pp. 827–832.
- DATE-2006-DasBDC #design #model checking #question #what
- What lies between design intent coverage and model checking? (SD, PB, PD, PPC), pp. 1217–1222.
- DATE-DF-2006-DasMDC #synthesis
- Synthesis of system verilog assertions (SD, RM, PD, PPC), pp. 70–75.
- DATE-v1-2004-BasuDDCMF #architecture #design #question #verification
- Formal Verification Coverage: Are the RTL-Properties Covering the Design’s Architectural Intent? (PB, SD, PD, PPC, CRM, LF), pp. 668–669.
- DAC-2002-ChakrabartiDCB #interface #realtime #specification #verification
- Formal verification of module interfaces against real time specifications (AC, PD, PPC, AB), pp. 141–145.
- DATE-2001-DasguptaCNKC #abstraction #component #linear
- Abstraction of word-level linear arithmetic functions from bit-level component descriptions (PD, PPC, AN, SK, AC), pp. 4–8.