BibSLEIGH — David_B

Travelled to:

1 × Belgium
1 × China
1 × France
1 × Ireland
1 × Korea
1 × Sweden
1 × United Kingdom
14 × USA
3 × Canada
3 × Germany

Collaborated with:

F.Müller G.S.Tyson G.Uh P.A.Kulkarni J.W.Davidson M.Själander R.v.Engelen X.Yuan P.Gavin A.Bardizbanyan P.Larsson-Edefors J.Hiser S.R.Hines ∅ C.A.Healy M.R.Boyd Y.Paek S.Hines M.R.Jantz J.Cho Y.Wang S.Jinturkar C.Burns V.Cao M.Yang L.Ko M.G.Harmon D.L.Jones J.Coffman W.C.Kreahling E.Vivancos W.Zhao M.W.Bailey K.Gallivan R.Baird Y.Peress S.A.McKee P.Stenström I.Finlayson B.Davis H.Moon K.Cho B.Cai

Talks about:

optim (9) improv (8) effici (7) phase (6) instruct (5) analysi (5) data (5) code (5) search (4) effect (4)

Person: David B. Whalley

DBLP: Whalley:David_B=

Facilitated 1 volumes:

Contributed to:

2015

2014

2013

2010

2009

2007

2006

2004

2003

2002

2001

2000

1999

1998

1997

1995

1994

1993

1992

Wrote 31 papers:

LCTES-2015-BairdGSWU #architecture #optimisation #pipes and filters: Optimizing Transfers of Control in the Static Pipeline Architecture (RB, PG, MS, DBW, GRU), p. 10.
LCTES-2015-BardizbanyanSWL #data access #performance #using: Improving Data Access Efficiency by Using Context-Aware Loads and Stores (AB, MS, DBW, PLE), p. 10.
DATE-2014-BardizbanyanSWL #data flow #dependence #detection #energy: Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3) (AB, MS, DBW, PLE), pp. 1–4.
LCTES-2014-Whalley #data access #energy #performance: Energy efficient data access techniques (DBW), p. 1.
CGO-2013-BardizbanyanGWSLMS #data access #performance #using: Improving data access efficiency by using a tagless access buffer (TAB) (AB, PG, DBW, MS, PLE, SAM, PS), p. 11.
LCTES-2013-FinlaysonDGUWST #performance #pipes and filters: Improving processor efficiency by statically pipelining instructions (IF, BD, PG, GRU, DBW, MS, GST), pp. 33–44.
LCTES-2010-KulkarniJW #optimisation #performance #sequence: Improving both the performance benefits and speed of optimization phase sequence searches (PAK, MRJ, DBW), pp. 95–104.
LCTES-2009-HinesPGWT #behaviour #lookahead: Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE) (SRH, YP, PG, DBW, GST), pp. 119–128.
CGO-2007-KulkarniWT #algorithm #heuristic #optimisation #order: Evaluating Heuristic Optimization Phase Order Search Algorithms (PAK, DBW, GST), pp. 157–169.
LCTES-2007-CoffmanHMW #analysis #parametricity: Generalizing parametric timing analysis (JC, CAH, FM, DBW), pp. 152–154.
LCTES-2007-HinesTW #using: Addressing instruction fetch bottlenecks by using an instruction register file (SRH, GST, DBW), pp. 165–174.
SAC-2007-HiserDW #design #embedded #memory management #performance: Fast, accurate design space exploration of embedded systems memory configurations (JH, JWD, DBW), pp. 699–706.
CGO-2006-KulkarniWTD #optimisation #order: Exhaustive Optimization Phase Order Space Exploration (PAK, DBW, GST, JWD), pp. 306–318.
LCTES-2006-KreahlingHWT #comparison #cost analysis #specification #using: Reducing the cost of conditional transfers of control by using comparison specifications (WCK, SH, DBW, GST), pp. 64–71.
LCTES-2006-KulkarniWTD #optimisation #order: In search of near-optimal optimization phase orderings (PAK, DBW, GST, JWD), pp. 83–92.
PLDI-2004-KulkarniHHWDJ #effectiveness #optimisation #performance #sequence: Fast searches for effective optimization phase sequences (PAK, SH, JH, DBW, JWD, DLJ), pp. 171–182.
LCTES-2003-KulkarniZMCWDBPG #effectiveness #optimisation #sequence: Finding effective optimization phase sequences (PAK, WZ, HM, KC, DBW, JWD, MWB, YP, KG), pp. 12–23.
SAC-2003-EngelenWY #embedded #validation: Validation of Code-Improving Transformations for Embedded Systems (RvE, DBW, XY), pp. 684–691.
LCTES-SCOPES-2002-ChoPW #algorithm #architecture #graph #memory management #performance: Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms (JC, YP, DBW), pp. 130–138.
LCTES-SCOPES-2002-ZhaoCWBEYHDGJ #interactive #named: VISTA: a system for interactive code improvement (WZ, BC, DBW, MWB, RvE, XY, JH, JWD, KG, DLJ), pp. 155–164.
LCTES-OM-2001-VivancosHMW #analysis #parametricity: Parametric Timing Analysis (EV, CAH, FM, DBW), pp. 88–93.
CC-2000-UhWWJBC #effectiveness: Techniques for Effectively Exploiting a Zero Overhead Loop Buffer (GRU, YW, DBW, SJ, CB, VC), pp. 157–172.
LCTES-2000-EngelenWY #automation #validation: Automatic Validation of Code-Improving Transformations (RvE, DBW, XY), pp. 206–210.
LCTES-1999-UhWWJBC #effectiveness: Effective Exploitation of a Zero Overhead Loop Buffer (GRU, YW, DBW, SJ, CB, VC), pp. 10–19.
PLDI-1998-YangUW #branch #order #performance: Improving Performance by Branch Reordering (MY, GRU, DBW), pp. 130–141.
SAS-1997-UhW #branch #performance: Coalescing Conditional Branches into Efficient Indirect Jumps (GRU, DBW), pp. 315–329.
LCT-RTS-1995-KoWH #analysis #constraints: Supporting User-Friendly Analysis of Timing Constraints (LK, DBW, MGH), pp. 99–107.
PLDI-1995-MuellerW #branch #replication: Avoiding Conditional Branches by Code Replication (FM, DBW), pp. 56–66.
SAS-1994-MuellerW #analysis #behaviour #on the fly #performance #simulation: Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation (FM, DBW), pp. 101–115.
PLDI-1993-BoydW #analysis #fault #optimisation: Isolation and Analysis of Optimization Errors (MRB, DBW), pp. 26–35.
PLDI-1992-MuellerW #replication: Avoiding Unconditional Jumps by Code Replication (FM, DBW), pp. 322–330.