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Travelled to:
1 × China
8 × USA
Collaborated with:
D.S.Doermann A.Sharma M.Rim A.C.Parker N.Park D.W.Oard Y.Fann R.D.Leone A.Mujumdar H.Wang K.Küçükçakar M.J.Mlinar
Talks about:
synthesi (7) level (5) high (5) applic (4) schedul (3) use (3) document (2) pipelin (2) identif (2) writer (2)

Person: Rajiv Jain

DBLP DBLP: Jain:Rajiv

Contributed to:

DRR 20142014
ICDAR 20132013
ICDAR 20112011
DAC 19941994
DAC 19931993
DAC 19921992
DAC 19911991
DAC 19891989
DAC 19881988
DAC 19871987

Wrote 13 papers:

DRR-2014-JainOD #documentation #image #retrieval #scalability #using
Scalable ranked retrieval using document images (RJ, DWO, DSD), p. ?–15.
ICDAR-2013-JainD #detection #documentation #image #named #verification
VisualDiff: Document Image Verification and Change Detection (RJ, DSD), pp. 40–44.
ICDAR-2013-JainD13a #identification #using
Writer Identification Using an Alphabet of Contour Gradient Descriptors (RJ, DSD), pp. 550–554.
ICDAR-2011-JainD #identification #using
Offline Writer Identification Using K-Adjacent Segments (RJ, DSD), pp. 769–773.
DAC-1994-FannRJ #scheduling #synthesis
Global Scheduling for High-Level Synthesis Applications (YF, MR, RJ), pp. 542–546.
DAC-1993-SharmaJ #named #scheduling
InSyn: Integrated Scheduling for DSP Applications (AS, RJ), pp. 349–354.
DAC-1993-SharmaJ93a #architecture #performance #synthesis
Estimating Architectural Resources and Performance for High-Level Synthesis Applications (AS, RJ), pp. 355–360.
DAC-1992-RimJ #branch #representation #synthesis
Representing Conditional Branches for High-Level Synthesis Applications (MR, RJ), pp. 106–111.
DAC-1992-RimJL #synthesis
Optimal Allocation and Binding in High-Level Synthesis (MR, RJ, RDL), pp. 120–123.
DAC-1991-JainMSW #empirical #evaluation #heuristic #scheduling #synthesis
Empirical Evaluation of Some High-Level Synthesis Scheduling Heuristics (RJ, AM, AS, HW), pp. 686–689.
DAC-1989-JainKMP #experience #synthesis
Experience with ADAM Synthesis System (RJ, KK, MJM, ACP), pp. 56–61.
DAC-1988-JainPP #pipes and filters #synthesis
Module Selection for Pipelined Synthesis (RJ, ACP, NP), pp. 542–547.
DAC-1987-JainPP #design #pipes and filters #predict #trade-off
Predicting Area-Time Tradeoffs for Pipelined Design (RJ, ACP, NP), pp. 35–41.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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