Travelled to:1 × Sweden
16 × USA
Collaborated with:N.Park F.J.Kurdahi K.Küçükçakar L.J.Hafer D.Knapp R.Jain M.J.Mlinar J.J.Granacki M.Potkonjak P.Gupta Y.Hung S.Prakash J.Weng J.J.G.Jr. S.Sastry M.A.Breuer A.W.Nagle A.H.Altman Y.G.Tirat-Gefen D.C.d.S.Jr. Y.G.DeCastelo-Vide-e-Souza A.Hussain M.C.McFarland R.Camposano J.T.Pizarro C.Chen J.C.DeSouza-Batista Z.Iqbal S.Dey H.Afsarmanesh D.McLeod D.E.Thomas D.P.Siewiorek M.Barbacci G.W.Leive J.Kim
Talks about:design (15) synthesi (10) system (8) level (7) transfer (4) tradeoff (4) program (4) specif (4) regist (4) autom (4)
Person: Alice C. Parker
DBLP: Parker:Alice_C=
Contributed to:
199719951994199319921991199019891988198719861985
1985198419831981198019791978Wrote 32 papers:
- DAC-1997-Tirat-GefenSP #design #multi
- Incorporating Imprecise Computation into System-Level Design of Application-Specific Heterogeneous Multiprocessors (YGTG, DCdSJ, ACP), pp. 58–63.
- DAC-1995-DeCastelo-Vide-e-SouzaPP #algorithm #approach #architecture #optimisation #throughput #using
- Optimal ILP-Based Approach for Throughput Optimization Using Simultaneous Algorithm/Architecture Matching and Retiming (YGDVeS, MP, ACP), pp. 113–118.
- DAC-1994-GuptaCDP #design #experience #image #tool support #using
- Experience with Image Compression Chip Design using Unified System Construction Tools (PG, CTC, JCDB, ACP), pp. 250–256.
- DAC-1993-IqbalPDP #algebra #using
- Critical Path Minimization Using Retiming and Algebraic Speed-Up (ZI, MP, SD, ACP), pp. 573–577.
- DAC-1992-HungP #constraints #design #multi #synthesis
- High-Level Synthesis with Pin Constraints for Multiple-Chip Designs (YHH, ACP), pp. 231–234.
- DAC-1991-KucukcakarP #constraints #named
- CHOP: A Constraint-Driven System-Level Partitioner (KK, ACP), pp. 514–519.
- DAC-1991-ParkerGH #design #physics #trade-off
- The Effects of Physical Design Characteristics on the Area-Performance Tradeoff Curve (ACP, PG, AH), pp. 530–534.
- DAC-1991-PrakashP #architecture #multi #synthesis
- Synthesis of Application-Specific Multiprocessor Architectures (SP, ACP), pp. 8–13.
- DAC-1991-WengP #3d #scheduling #synthesis
- 3D Scheduling: High-Level Synthesis with Floorplanning (JPW, ACP), pp. 668–673.
- DAC-1990-KucukcakarP #trade-off #using
- Data Path Tradeoffs Using MABAL (KK, ACP), pp. 511–516.
- DAC-1989-JainKMP #experience #synthesis
- Experience with ADAM Synthesis System (RJ, KK, MJM, ACP), pp. 56–61.
- DAC-1988-JainPP #pipes and filters #synthesis
- Module Selection for Pipelined Synthesis (RJ, ACP, NP), pp. 542–547.
- DAC-1988-McFarlandPC #synthesis #tutorial
- Tutorial on High-Level Synthesis (MCM, ACP, RC), pp. 330–336.
- DAC-1987-GranackiP #interface #named #natural language #specification
- PHRAN-SPAN: A Natural Language Interface for System Specifications (JJGJ, ACP), pp. 416–422.
- DAC-1987-JainPP #design #pipes and filters #predict #trade-off
- Predicting Area-Time Tradeoffs for Pipelined Design (RJ, ACP, NP), pp. 35–41.
- DAC-1987-KurdahiP #named
- REAL: a program for REgister ALlocation (FJK, ACP), pp. 210–215.
- DAC-1986-KnappP #design
- A design utility manager: the ADAM planning engine (DK, ACP), pp. 48–54.
- DAC-1986-KurdahiP #estimation #named
- PLEST: a program for area estimation of VLSI integrated circuits (FJK, ACP), pp. 467–473.
- DAC-1986-ParkP #named #pipes and filters #synthesis
- Sehwa: a program for synthesis of pipelines (NP, ACP), pp. 454–460.
- DAC-1986-ParkerPM #named #synthesis
- MAHA: a program for datapath synthesis (ACP, JTP, MJM), pp. 461–466.
- DAC-1985-GranackiKP #automation #design #interface #natural language #overview
- The ADAM advanced design automation system: overview, planner and natural language interface (JJG, DK, ACP), pp. 727–730.
- DAC-1985-ParkP #synthesis
- Synthesis of optimal clocking schemes (NP, ACP), pp. 489–495.
- VLDB-1985-AfsarmaneshMKP #approach #database #object-oriented
- An Extensible Object-Oriented Approach to Databases for VLSI/CAD (HA, DM, DK, ACP), pp. 13–24.
- DAC-1984-ParkerKM #design #synthesis #verification
- A general methodology for synthesis and verification of register-transfer designs (ACP, FJK, MJM), pp. 329–335.
- DAC-1984-SastryP #logic #on the #slicing
- On the relation between wire length distributions and placement of logic on master slice ICs (SS, ACP), pp. 710–711.
- DAC-1983-GranackiP #design #performance #trade-off
- The effect of register-transfer design tradeoffs on chip area and performance (JJG, ACP), pp. 419–424.
- DAC-1981-BreuerP #roadmap #simulation
- Digital system simulation: Current status and future trends or darwin’s theory of simulation (MAB, ACP), pp. 269–275.
- DAC-1981-HaferP #analysis #design #formal method #logic #specification
- A formal method for the specification, analysis, and design of register-transfer level digital logic (LJH, ACP), pp. 846–853.
- DAC-1981-NagleP #algorithm #design #hardware #multi
- Algorithms for multiple-criterion design of microprogrammed control hardware (AWN, ACP), pp. 486–493.
- DAC-1980-AltmanP #analysis #design
- The SLIDE simulator: A facility for the design and analysis of computer interconnections (AHA, ACP), pp. 148–155.
- DAC-1979-ParkerTSBHLK #automation #design
- The CMU design automation system: An example of automated data path design (ACP, DET, DPS, MB, LJH, GWL, JK), pp. 73–80.
- DAC-1978-HaferP #automation #design #process
- Register-transfer level digital design automation: The allocation process (LJH, ACP), pp. 213–219.