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Travelled to:
1 × Germany
1 × Japan
1 × Sweden
3 × France
3 × USA
Collaborated with:
Q.Xu F.Yuan D.Wu J.Jiang Y.Yang S.Wang S.T.Chakradhar M.Song L.Zhang J.Bu C.Chen D.Tao D.Cao D.Yuan Y.Zhang S.Wang L.Fan J.Xu X.Li L.Gong J.C.Grundy L.Sun Y.Wang
Talks about:
silicon (4) trace (4) test (4) signal (3) select (3) scan (3) post (3) checkpoint (2) workflow (2) suppli (2)

Person: Xiao Liu

DBLP DBLP: Liu:Xiao

Contributed to:

ASE 20142014
ICSE 20132013
DAC 20122012
ICPR 20122012
DATE 20112011
DATE 20102010
DAC 20092009
DATE 20092009
DATE v2 20042004
ASE 20192019
CASE 20192019

Wrote 13 papers:

ASE-2014-LiuW #named #programming
PiE: programming in eliza (XL, DW), pp. 695–700.
ICSE-2013-LiuYCY #monitoring #novel #parallel #process
Selecting checkpoints along the time line: a novel temporal checkpoint selection strategy for monitoring a batch of parallel business processes (XL, YY, DC, DY), pp. 1281–1284.
DAC-2012-YuanLX #configuration management #debugging #named
X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug (FY, XL, QX), pp. 555–560.
ICPR-2012-LiuSZWBCT #bound #detection
Joint shot boundary detection and key frame extraction (XL, MS, LZ, SW, JB, CC, DT), pp. 2565–2568.
ICPR-2012-ZhangSSLWTBC #category theory #image #kernel
Spatial graphlet matching kernel for recognizing aerial image categories (LZ, MS, LS, XL, YW, DT, JB, CC), pp. 2813–2816.
DATE-2011-LiuX #debugging #multi #on the
On multiplexed signal tracing for post-silicon debug (XL, QX), pp. 685–690.
DATE-2010-LiuZYX #power management #pseudo #testing
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects (XL, YZ, FY, QX), pp. 1432–1437.
DAC-2009-LiuX #design #validation
Interconnection fabric design for tracing signals in post-silicon validation (XL, QX), pp. 352–357.
DATE-2009-LiuX #validation
Trace signal selection for visibility enhancement in post-silicon validation (XL, QX), pp. 1338–1343.
DATE-2009-LiuX09a #framework #reduction
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment (XL, QX), pp. 1494–1499.
DATE-v2-2004-WangLC #fault #hardware #hybrid #testing
Hybrid Delay Scan: A Low Hardware Overhead Scan-Based Delay Test Technique for High Fault Coverage and Compact Test Sets (SW, XL, STC), pp. 1296–1301.
ASE-2019-LiuFXLGGY #automation #evaluation #named #performance #simulation #tool support #workflow
FogWorkflowSim: An Automated Simulation Toolkit for Workflow Performance Evaluation in Fog Computing (XL, LF, JX, XL, LG, JCG, YY), pp. 1114–1117.
CASE-2019-JiangL #bound #game studies #network
Bayesian Stackelberg Game Model for Water Supply Networks against Bounded Rational Interdictors (JJ, XL), pp. 842–847.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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