BibSLEIGH — Henk

Travelled to:

1 × Cyprus
1 × Sweden
1 × The Netherlands
1 × United Kingdom
11 × USA
5 × Germany
6 × France

Collaborated with:

S.Stuijk M.Geilen C.Nugteren A.G.M.Cilio T.Basten F.Catthoor J.Hoogerbrugge A.Kumar B.Mesman I.Karkowski Y.He G.v.d.Braak M.J.G.Bekooij D.She T.Marescaux J.Janssen A.Li Y.Yang M.Peemen F.Siyoum J.P.H.M.Hausmans P.Qiao M.Lindwer M.Funk P.v.d.Putten M.Jayapala P.Vanbroekhoven Y.C.Tay L.Waeijen H.E.Bal S.J.Geuns T.Bijlsma H.W.M.v.Moll V.Reyes M.Boonen A.Hansson J.Huisken S.V.Gheorghita E.Brockmeyer M.Miranda M.Boekhold S.Fernando M.Wijtvliet M.Damavandpeyma B.D.Theelen Y.Ha A.Terechko E.L.Thenaff M.Garg J.T.J.v.Eijndhoven P.Raghavan A.Lambrechts D.Verkest T.V.Aa F.Barat G.Deconinck Shuaiwen Leon Song Weifeng Liu 0002 X.L.0001 Akash Kumar 0001 R.Frijns S.Adyanthaya J.Voeten M.C.W.Geilen R.R.H.Schiffelers Y.Pu R.P.Kleihorst Z.Ye A.A.Abbo S.M.Londono P.Marchal J.I.Gómez L.Piñuel D.Bruni L.Benini U.Waqas J.Kandelaars L.J.Somers P.Vestjens S.Hamdioui L.Xie H.A.D.Nguyen M.Taouil K.Bertels H.Jiao D.Wouters L.Eike J.v.Lunteren

Talks about:

model (9) processor (6) multi (6) schedul (5) system (5) energi (5) design (5) graph (5) architectur (4) dataflow (4)

Person: Henk Corporaal

DBLP: Corporaal:Henk

Contributed to:

2015

2014

2013

2012

2011

2010

2009

2008

2007

2005

2004

2003

2002

1999

1998

1996

1994

1992

2017

Wrote 40 papers:

DATE-2015-FernandoWNKC #agile #algorithm #design #synthesis #using: (AS)2: accelerator synthesis using algorithmic skeletons for rapid design space exploration (SF, MW, CN, AK, HC), pp. 305–308.
DATE-2015-HamdiouiXNTBCJC #architecture #data-driven #in memory: Memristor based computation-in-memory architecture for data-intensive applications (SH, LX, HADN, MT, KB, HC, HJ, FC, DW, LE, JvL), pp. 1718–1725.
DATE-2015-PeemenMC #embedded #optimisation #reuse: Inter-tile reuse optimization applied to bandwidth constrained embedded accelerators (MP, BM, HC), pp. 169–174.
DATE-2015-WaqasGKSBSVC #heuristic #online #scalability #scheduling: A re-entrant flowshop heuristic for online scheduling of the paper path in a large scale printer (UW, MG, JK, LJS, TB, SS, PV, HC), pp. 573–578.
HPDC-2015-LiTKC #named #parallel #thread #visual notation: Transit: A Visual Analytical Model for Multithreaded Machines (AL, YCT, AK, HC), pp. 101–106.
DAC-2014-SiyoumGC #analysis #data flow: Symbolic Analysis of Dataflow Applications Mapped onto Shared Heterogeneous Resources (FS, MG, HC), p. 6.
DAC-2014-WaeijenSCH #reduction: Reduction Operator for Wide-SIMDs Reconsidered (LW, DS, HC, YH), p. 6.
DATE-2014-FrijnsASVGSC #analysis #graph: Timing analysis of First-Come First-Served scheduled interval-timed Directed Acyclic Graphs (RF, SA, SS, JV, MCWG, RRHS, HC), pp. 1–6.
HPCA-2014-NugterenBCB #distance #gpu #modelling #reuse: A detailed GPU cache model based on reuse distance theory (CN, GJvdB, HC, HEB), pp. 37–48.
DATE-2013-NugterenBC #architecture #future of #parametricity: Future of GPGPU micro-architectural parameters (CN, GJvdB, HC), pp. 392–395.
DATE-2012-DamavandpeymaSBGC #data flow #graph #modelling: Modeling static-order schedules in synchronous dataflow graphs (MD, SS, TB, MG, HC), pp. 775–780.
DATE-2012-SheHMC #architecture #energy #scheduling: Scheduling for register file energy minimization in explicit datapath architectures (DS, YH, BM, HC), pp. 388–393.
DATE-2012-YangGBSC #game studies #graph #policy #resource management: Playing games with scenario- and resource-aware SDF graphs through policy iteration (YY, MG, TB, SS, HC), pp. 194–199.
PPoPP-2012-NugterenC #adaptation #parallel #performance #predict: The boat hull model: adapting the roofline model to enable performance prediction for parallel computing (CN, HC), pp. 291–292.
DATE-2011-GeunsBBC #parallel #source code: Parallelization of while loops in nested loop programs for shared-memory multiprocessor systems (SJG, MJGB, TB, HC), pp. 697–702.
DATE-2011-HausmansBC #data flow #graph: Resynchronization of Cyclo-Static Dataflow graphs (JPHMH, MJGB, HC), pp. 1315–1320.
DATE-2011-QiaoCL: A 0.964mW digital hearing aid system (PQ, HC, ML), pp. 883–886.
DAC-2010-HePKYALC #energy #named #throughput: Xetal-Pro: an ultra-low energy and high throughput SIMD processor (YH, YP, RPK, ZY, AAA, SML, HC), pp. 543–548.
DATE-2010-YangGBSC #automation: Automated bottleneck-driven design-space exploration of media processing systems (YY, MG, TB, SS, HC), pp. 1041–1046.
DATE-2009-MollCRB #modelling #performance #protocol #using: Fast and accurate protocol specific bus modeling using TLM 2.0 (HWMvM, HC, VR, MB), pp. 316–319.
SEKE-2008-FunkPC #execution #specification: Model Interpretation for Executable Observation Specifications (MF, PvdP, HC), pp. 785–790.
DAC-2007-KumarMCTH #approach #estimation #multi #performance #probability: A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices (AK, BM, HC, BDT, YH), pp. 726–731.
DAC-2007-MarescauxC: Introducing the SuperGT Network-on-Chip; SuperGT QoS: more than just GT (TM, HC), pp. 116–121.
DAC-2007-StuijkBGC #data flow #graph #multi #resource management: Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs (SS, TB, MG, HC), pp. 777–782.
DATE-2007-KumarHHC #configuration management #design #interactive #multi: Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip (AK, AH, JH, HC), pp. 117–122.
DATE-2007-RaghavanLJCVC #embedded #power management #symmetry: Very wide register: an asymmetric register file organization for low power embedded processors (PR, AL, MJ, FC, DV, HC), pp. 1066–1071.
DAC-2005-GheorghitaSBC #automation #detection #estimation: Automatic scenario detection for improved WCET estimation (SVG, SS, TB, HC), pp. 101–104.
SAC-2004-JayapalaABDCC #energy #optimisation #scheduling: L0 buffer energy optimization through scheduling and exploration (MJ, TVA, FB, GD, FC, HC), pp. 905–906.
DATE-2003-BrockmeyerMCC #energy #memory management #multi: Layer Assignment echniques for Low Energy in Multi-Layered Memory Organisations (EB, MM, HC, FC), pp. 11070–11075.
DATE-2003-MarchalGPBBCC #energy #memory management #multi #platform: SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms (PM, JIG, LP, DB, LB, FC, HC), pp. 10516–10523.
HPCA-2003-TerechkoTGEC #clustering #communication #modelling: Inter-Cluster Communication Models for Clustered VLIW Processors (AT, ELT, MG, JTJvE, HC), pp. 354–364.
LCTES-2003-VanbroekhovenCC #array: Advanced copy propagation for arrays (PV, HC, FC), pp. 24–33.
CC-2002-CilioC #using: Global Variable Promotion: Using Registers to Reduce Cache Power Dissipation (AGMC, HC), pp. 247–260.
CC-1999-BoekholdKCC #c #programmable: A Programmable ANSI C Transformation Engine (MB, IK, HC, AGMC), pp. 292–295.
CC-1999-CilioC #c #fixpoint #float: Floating Point to Fixed Point Conversion of C Code (AGMC, HC), pp. 229–243.
DAC-1998-KarkowskiC #algorithm #design #embedded #multi: Design Space Exploration Algorithm for Heterogeneous Multi-Processor Embedded System Design (IK, HC), pp. 82–87.
CC-1996-JanssenC: Controlled Node Splitting (JJ, HC), pp. 44–58.
CC-1994-HoogerbruggeC: Transport-Triggering versus Operation-Triggering (JH, HC), pp. 435–449.
CC-1992-HoogerbruggeC #architecture #pipes and filters: Comparing Software Pipelining for an Operation-Triggered and a Tarnsport-Triggered Architecture (JH, HC), pp. 219–228.
ASPLOS-2017-LiS0L0C #clustering: Locality-Aware CTA Clustering for Modern GPUs (AL, SLS, WL0, XL0, AK0, HC), pp. 297–311.