BibSLEIGH — Huazhong

Travelled to:

2 × Germany
3 × USA
5 × France

Collaborated with:

Y.Wang Y.Liu X.Chen Y.Xie B.Li R.Luo Y.Chen X.Sheng Y.Wang R.P.Dick S.Li L.Xia G.Sun N.Xu H.Luo D.Zhang H.Li L.Shang P.Gu Y.Liang H.H.Li X.He X.S.Hu L.Ren C.Zhang H.Long X.Fan M.Chang Y.Gu C.Zhang W.Liu G.Chen X.Han W.Wang Y.Cao K.He G.Li H.Hoffmann J.Li T.Wu C.J.Xue T.Tang T.Wu D.Wu X.Zhang Y.Liu B.Sai M.Chiang Q.Zhao Z.Li X.Li K.Ma S.John J.Shu Y.Zhang W.Zhang Y.Sun J.Klein D.Ravelosona W.Zhao

Talks about:

energi (6) base (6) nonvolatil (5) circuit (5) power (5) parallel (4) effici (4) processor (3) network (3) system (3)

Person: Huazhong Yang

DBLP: Yang:Huazhong

Contributed to:

2015

2014

2013

2012

2011

2009

2007

Wrote 21 papers:

DAC-2015-LiCSHLWY #hybrid #power management: A STT-RAM-based low-power hybrid register file for GPGPUs (GL, XC, GS, HH, YL, YW, HY), p. 6.
DAC-2015-LiXGWY #interface: Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system (BL, LX, PG, YW, HY), p. 6.
DAC-2015-LiuLLWLMLCJ0SY #energy: Ambient energy harvesting nonvolatile processors: from circuit to system (YL, ZL, HL, YW, XL, KM, SL, MFC, SJ, YX, JS, HY), p. 6.
DAC-2015-ZhangLSLWXY #energy #migration #scheduling: Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration (DZ, YL, XS, JL, TW, CJX, HY), p. 6.
DATE-2015-ChenWY #parallel #performance: A fast parallel sparse solver for SPICE-based circuit simulators (XC, YW, HY), pp. 205–210.
DATE-2015-LiLZGSSZCLY #energy #performance: An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes (HL, YL, QZ, YG, XS, GS, CZ, MFC, RL, HY), pp. 7–12.
DATE-2015-SunZLZZGSKRLZY #design #memory management: From device to system: cross-layer design exploration of racetrack memory (GS, CZ, HL, YZ, WZ, YG, YS, JOK, DR, YL, WZ, HY), pp. 1018–1023.
DATE-2015-TangXLLCWY #network #question: Spiking neural network with RRAM: can we use it for real-world application? (TT, LX, BL, RL, YC, YW, HY), pp. 860–865.
DAC-2014-ChenWLXY #optimisation #runtime: Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs (XC, YW, YL, YX, HY), p. 6.
DAC-2014-LiuCHWXY #3d #design: Design Methodologies for 3D Mixed Signal Integrated Circuits: a Practical 12-bit SAR ADC Design Case (WL, GC, XH, YW, YX, HY), p. 6.
DATE-2014-0002LLCXY #big data #data analysis #energy #network #performance: Energy efficient neural networks for big data analytics (YW, BL, RL, YC, NX, HY), pp. 1–2.
DATE-2014-LiWCLY #named: ICE: Inline calibration for memristor crossbar-based computing engine (BL, YW, YC, HHL, HY), pp. 1–4.
DATE-2013-HeLLHY #streaming #synthesis: Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications (XH, SL, YL, XSH, HY), pp. 992–995.
DATE-2013-ShengWLY #named #parallel: SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors (XS, YW, YL, HY), pp. 865–868.
DAC-2012-RenCWZY #gpu #parallel #simulation: Sparse LU factorization for parallel circuit simulation on GPU (LR, XC, YW, CZ, HY), pp. 1125–1130.
DATE-2012-WangLLZLSCY #architecture: A compression-based area-efficient recovery architecture for nonvolatile processors (YW, YL, YL, DZ, SL, BS, MFC, HY), pp. 1519–1524.
DATE-2011-WuWWZLXY #architecture #parallel #programming: Gemma in April: A matrix-like parallel programming architecture on OpenCL (TW, DW, YW, XZ, HL, NX, HY), pp. 703–708.
DATE-2009-0002CWCXY #optimisation: Gate replacement techniques for simultaneous leakage and aging optimization (YW, XC, WW, YC, YX, HY), pp. 328–333.
DATE-2009-LongLFDY #adaptation #clustering #energy #network: Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks (HL, YL, XF, RPD, HY), pp. 1267–1272.
DATE-2007-LiuDSY #estimation #power management: Accurate temperature-dependent integrated circuit leakage power estimation is easy (YL, RPD, LS, HY), pp. 1526–1531.
DATE-2007-WangLHLYX #modelling #performance: Temperature-aware NBTI modeling and the impact of input vector control on performance degradation (YW, HL, KH, RL, HY, YX), pp. 546–551.