BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
12 × USA
6 × Germany
7 × France
Collaborated with:
D.Marculescu Ü.Y.Ogras M.Pedram C.Chou J.Hu A.Nandi P.Bogdan J.Kao H.G.Lee N.Chang X.Hu T.Dumitras G.Varatkar C.Tsui I.M.Elfadel D.Atienza A.M.Miron N.H.Zamora J.M.Rabaey A.L.Sangiovanni-Vincentelli Z.Ren B.H.Krogh J.Henkel P.K.Khosla P.P.Pande S.Garg P.Choudhary Z.Qian D.Juan K.Duraisamy R.G.Kim W.Choi G.Liu F.Clermidy D.Puschini I.Mansouri A.Ganguly M.Lindwer T.Basten R.Zimmermann S.Jung E.Cantatore H.Matsutani M.Koibuchi I.Fujiwara T.Kagami Y.Take T.Kuroda H.Amano
Talks about:
chip (16) network (14) design (8) power (8) system (7) analysi (6) energi (6) perform (5) applic (5) awar (5)

Person: Radu Marculescu

DBLP DBLP: Marculescu:Radu

Contributed to:

DAC 20152015
DATE 20142014
DATE 20132013
DATE 20112011
DAC 20102010
DAC 20092009
DATE 20092009
DAC 20082008
DATE 20082008
DAC 20072007
DATE 20072007
DAC 20062006
DATE 20062006
DATE 20052005
DAC 20042004
DATE v1 20042004
DATE v2 20042004
DATE 20032003
DAC 20022002
DAC 20012001
DATE 20012001
DATE 19981998
DAC 19971997
DAC 19961996
DAC 19951995

Wrote 39 papers:

DAC-2015-DuraisamyKCLPMM #energy #manycore #performance #pipes and filters #platform
Energy efficient MapReduce with VFI-enabled multicore platforms (KD, RGK, WC, GL, PPP, RM, DM), p. 6.
DATE-2014-MatsutaniKFKTKBMA #3d #random
Low-latency wireless 3D NoCs via randomized shortcut chips (HM, MK, IF, TK, YT, TK, PB, RM, HA), pp. 1–6.
DATE-2013-ElfadelMA #formal method #industrial #manycore
Closed-loop control for power and thermal management in multi-core processors: formal methods and industrial practice (IME, RM, DA), pp. 1879–1881.
DATE-2013-QianJBTMM #analysis #named #performance #using
SVR-NoC: a performance analysis tool for network-on-chips using learning-based support vector regression model (ZQ, DCJ, PB, CYT, DM, RM), pp. 354–357.
DATE-2011-ChouM #multi #named #resource management
FARM: Fault-aware resource management in NoC-based multiprocessor platforms (CLC, RM), pp. 673–678.
DATE-2011-PandeCPMBMG #energy #performance #question
Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms? (PPP, FC, DP, IM, PB, RM, AG), pp. 1656–1661.
DAC-2010-ChouMM #design #embedded #experience
Find your flow: increasing flow experience by designing “human” embedded systems (CLC, AMM, RM), pp. 619–620.
DAC-2009-GargMMO #design #multi #perspective
Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective (SG, DM, RM, ÜYO), pp. 818–821.
DATE-2009-ChouM #design
User-centric design space exploration for heterogeneous Network-on-Chip platforms (CLC, RM), pp. 15–20.
DAC-2008-OgrasMM #adaptation #feedback #multi
Variation-adaptive feedback control for networks-on-chip with multiple clock domains (ÜYO, RM, DM), pp. 614–619.
DATE-2008-ChouM
User-Aware Dynamic Task Allocation in Networks-on-Chip (CLC, RM), pp. 1232–1237.
DAC-2007-BogdanM #behaviour
Quantum-Like Effects in Network-on-Chip Buffers Behavior (PB, RM), pp. 266–267.
DAC-2007-OgrasMCM #clustering
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip (ÜYO, RM, PC, DM), pp. 110–115.
DATE-2007-OgrasM #analysis #modelling #performance
Analytical router modeling for networks-on-chip performance analysis (ÜYO, RM), pp. 1096–1101.
DATE-2007-ZamoraKM #distributed #network #video
Distributed power-management techniques for wireless network video systems (NHZ, JCK, RM), pp. 564–569.
DAC-2006-LeeOMC #design #multi #prototype
Design space exploration and prototyping for on-chip multimedia applications (HGL, ÜYO, RM, NC), pp. 137–142.
DAC-2006-OgrasM #predict
Prediction-based flow control for network-on-chip traffic (ÜYO, RM), pp. 839–844.
DATE-2006-MarculescuRS #design #idea #network #question
Is “Network” the next “Big Idea” in design? (RM, JMR, ALSV), pp. 254–256.
DATE-2006-OgrasMLC #architecture #communication #optimisation
Communication architecture optimization: making the shortest path shorter in regular networks-on-chip (ÜYO, RM, HGL, NC), pp. 712–717.
DATE-2005-KaoM #energy
Energy-Aware Routing for E-Textile Applications (JCK, RM), pp. 184–189.
DATE-2005-OgrasM #approach #architecture #communication #composition #energy #synthesis #using
Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach (ÜYO, RM), pp. 352–357.
DAC-2004-HuM #named
DyAD: smart routing for networks-on-chip (JH, RM), pp. 260–263.
DAC-2004-HuM04a #adaptation #clustering #multi
Adaptive data partitioning for ambient multimedia (XH, RM), pp. 562–565.
DATE-v1-2004-HuM #architecture #communication #constraints #energy #realtime #scheduling
Energy-Aware Communication and Task Scheduling for Network-on-Chip Architectures under Real-Time Constraints (JH, RM), pp. 234–239.
DATE-v1-2004-RenKM #adaptation #power management
Hierarchical Adaptive Dynamic Power Management (ZR, BHK, RM), pp. 136–141.
DATE-v2-2004-MarculescuPH #design #distributed #multi #perspective
Distributed Multimedia System Design: A Holistic Perspective (RM, MP, JH), pp. 1342–1349.
DATE-2003-DumitrasM #communication #probability
On-Chip Stochastic Communication (TD, RM), pp. 10790–10795.
DATE-2003-HuM #architecture #energy #flexibility #performance
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures (JH, RM), pp. 10688–10693.
DATE-2003-LindwerMBZMJC #concept
Ambient Intelligence Visions and Achievements: Linking Abstract Ideas to Real-World Concepts (ML, DM, TB, RZ, RM, SJ, EC), pp. 10010–10017.
DAC-2002-MarculescuMK #challenge #modelling #optimisation
Challenges and opportunities in electronic textiles modeling and optimization (DM, RM, PKK), pp. 175–180.
DAC-2002-VaratkarM #analysis #design #multi #network
Traffic analysis for on-chip networks design of multimedia applications (GV, RM), pp. 795–800.
DAC-2001-NandiM #analysis #design #embedded #performance
System-Level Power/Performance Analysis for Embedded Systems Design (AN, RM), pp. 599–604.
DATE-2001-MarculescuN #analysis #modelling #probability
Probabilistic application modeling for system-level perfromance analysis (RM, AN), pp. 572–579.
DATE-1998-MarculescuMP #estimation #probability
Trace-Driven Steady-State Probability Estimation in FSMs with Application to Power Estimation (DM, RM, MP), pp. 774–779.
DAC-1997-MarculescuMP #analysis #finite #probability #sequence #state machine
Sequence Compaction for Probabilistic Analysis of Finite-State Machines (DM, RM, MP), pp. 12–15.
DAC-1997-MarculescuMP97a #estimation #sequence
Hierarchical Sequence Compaction for Power Estimation (RM, DM, MP), pp. 570–575.
DAC-1996-MarculescuMP #generative #probability #sequence #synthesis
Stochastic Sequential Machine Synthesis Targeting Constrained Sequence Generation (DM, RM, MP), pp. 696–701.
DAC-1996-TsuiMMP #performance
Improving the Efficiency of Power Simulators by Input Vector Compaction (CYT, RM, DM, MP), pp. 165–168.
DAC-1995-MarculescuMP #correlation #estimation #performance
Efficient Power Estimation for Highly Correlated Input Streams (RM, DM, MP), pp. 628–634.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.