BibSLEIGH — Alan

Travelled to:

1 × Portugal
1 × United Kingdom
2 × France
4 × Germany
6 × USA

Collaborated with:

R.K.Brayton N.Eén V.N.Kravets S.Chatterjee J.R.Jiang M.A.Perkowski D.B.Strukov T.Sasao J.Baumgartner H.Mony M.L.Case A.P.Hurst N.Sörensson X.Wang T.Kam B.Steinbach A.Belov H.Chen J.Marques-Silva A.Kuehlmann J.S.Zhang M.Chrzanowska-Jeske T.Villa N.Yevtushenko R.Malvi S.Grygiel M.Burns P.K.Nalla P.Chauhan N.Sharma S.Ray S.Jang C.Chen

Talks about:

decomposit (5) logic (4) use (4) algorithm (3) synthesi (3) sequenti (3) function (3) base (3) sat (3) represent (2)

Person: Alan Mishchenko

DBLP: Mishchenko:Alan

Contributed to:

2013

2012

2010

2009

2008

2007

2006

2005

2003

2001

1999

Wrote 21 papers:

DATE-2013-Belov0MM #abstraction #satisfiability: Core minimization in SAT-based abstraction (AB, HC, AM, JMS), pp. 1411–1416.
DATE-2013-MishchenkoEBBMN #abstraction #named #revisited: GLA: gate-level abstraction revisited (AM, NE, RKB, JB, HM, PKN), pp. 1399–1404.
DATE-2013-MishchenkoEBCCS: A semi-canonical form for sequential AIGs (AM, NE, RKB, MLC, PC, NS), pp. 797–802.
DATE-2012-RayMEBJC: Mapping into LUT structures (SR, AM, NE, RKB, SJ, CC), pp. 1579–1584.
CAV-2010-BraytonM #named #verification: ABC: An Academic Industrial-Strength Verification Tool (RKB, AM), pp. 24–40.
DATE-2010-StrukovM #hybrid: Monolithically stackable hybrid FPGA (DBS, AM), pp. 661–666.
DATE-2009-KravetsM #logic #synthesis #using: Sequential logic synthesis using symbolic bi-decomposition (VNK, AM), pp. 1458–1463.
DATE-2009-MonyBMB #identification #scalability: Speculative reduction-based scalable redundancy identification (HM, JB, AM, RKB), pp. 1674–1679.
DAC-2008-CaseKMB: Merging nodes under sequential observability (MLC, VNK, AM, RKB), pp. 540–545.
DAC-2008-HurstMB #constraints #scalability: Scalable min-register retiming under timing and initializability constraints (APH, AM, RKB), pp. 534–539.
DAC-2007-ChatterjeeMBK #equivalence #on the #proving: On Resolution Proofs for Combinational Equivalence (SC, AM, RKB, AK), pp. 600–605.
SAT-2007-EenMS #logic #satisfiability #synthesis: Applying Logic Synthesis for Speeding Up SAT (NE, AM, NS), pp. 272–286.
DAC-2006-MishchenkoCB #fresh look #logic #synthesis: DAG-aware AIG rewriting a fresh look at combinational logic synthesis (AM, SC, RKB), pp. 532–535.
DAC-2006-ZhangMBC #detection #representation #satisfiability #scalability #simulation #symmetry #using: Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability (JSZ, AM, RKB, MCJ), pp. 510–515.
DATE-2005-MishchenkoB #network #optimisation #satisfiability: SAT-Based Complete Don’t-Care Computation for Network Optimization (AM, RKB), pp. 412–417.
DATE-2005-MishchenkoBJVY #equation #performance #using: Efficient Solution of Language Equations Using Partitioned Representations (AM, RKB, JHRJ, TV, NY), pp. 418–423.
DAC-2003-MishchenkoS #composition #functional #scalability #using: Large-scale SOP minimization using decomposition and functional properties (AM, TS), pp. 149–154.
DAC-2003-MishchenkoWK #algorithm #composition: A new enhanced constructive decomposition and mapping algorithm (AM, XW, TK), pp. 143–148.
DATE-2003-JiangMB #algebra #multi: Reducing Multi-Valued Algebraic Operations to Binary (JHRJ, AM, RKB), pp. 10752–10757.
DAC-2001-MishchenkoSP #algorithm #logic: An Algorithm for Bi-Decomposition of Logic Functions (AM, BS, MAP), pp. 103–108.
DAC-1999-PerkowskiMGBM #algorithm #evaluation #graph #performance: Graph Coloring Algorithms for Fast Evaluation of Curtis Decompositions (MAP, RM, SG, MB, AM), pp. 225–230.