Travelled to:1 × Germany
1 × Taiwan
1 × USA
5 × France
Collaborated with:G.Girão A.H.V.d.Lima L.Carro T.Santini L.Kunz E.W.Brião D.Barcelos M.Dziri W.O.Cesário A.A.Jerraya M.E.Kreutz M.Oyamada L.B.d.Brisolara M.F.d.S.Oliveira R.M.Redin L.C.Lamb A.Panato S.V.Silva M.O.Johann R.Reis S.Bampi E.P.d.Freitas T.Heimfarth L.A.G.Costa A.M.Ferreira C.E.Pereira T.Larsson
Talks about:design (3) strategi (2) applic (2) mpsoc (2) dynam (2) base (2) no (2) multiprocessor (1) processor (1) heterogen (1)
Person: Flávio Rech Wagner
DBLP: Wagner:Fl=aacute=vio_Rech
Contributed to:
20132011
20112008200420042000
1991Wrote 9 papers:
- DATE-2013-GiraoSW #clustering #policy
- Exploring resource mapping policies for dynamic clustering on NoC-based MPSoCs (GG, TS, FRW), pp. 681–684.
- DATE-2011-KunzGW #hardware #memory management #performance #transaction
- Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC (LK, GG, FRW), pp. 1168–1171.
- SAC-2011-FreitasHCFPWL
- Analyzing different levels of geographic context awareness in agent ferrying over VANETs (EPdF, TH, LAGC, AMF, CEP, FRW, TL), pp. 413–418.
- DATE-2008-BriaoBW #realtime
- Dynamic Task Allocation Strategies in MPSoC for Soft Real-time Applications (EWB, DB, FRW), pp. 1386–1389.
- DATE-2008-BrisolaraORLCW #code generation #uml #using
- Using UML as Front-end for Heterogeneous Software Code Generation Strategies (LBdB, MFdSO, RMR, LCL, LC, FRW), pp. 504–509.
- DATE-DF-2004-PanatoSWJRB #design #multi #pipes and filters
- Design of Very Deep Pipelined Multipliers for FPGAs (AP, SVS, FRW, MOJ, RR, SB), pp. 52–57.
- DATE-v2-2004-DziriCWJ #component #design #integration #multi #validation
- Unified Component Integration Flow for Multi-Processor SoC Design and Validation (MAD, WOC, FRW, AAJ), pp. 1132–1137.
- DATE-2000-CarroKWO #embedded #multi #synthesis
- System Synthesis for Multiprocessor Embedded Applications (LC, MEK, FRW, MO), pp. 697–702.
- DAC-1991-WagnerL #design #framework
- Design Version Management in the GARDEN Framework (FRW, AHVdL), pp. 704–710.