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Travelled to:
1 × France
1 × Germany
11 × USA
Collaborated with:
M.Potkonjak Q.Zhou C.D.Yin C.Dunbar L.Yuan F.Koushanfar ∅ J.L.Wong M.Gao K.Lai J.Gu A.O.Balkan U.Vishkin S.Hua S.S.Bhattacharyya J.Yu J.Bian N.Kawabe K.Usami I.Hong D.Kirovski M.B.Srivastava A.E.Caldwell H.Choi A.B.Kahng S.Mantik
Talks about:
techniqu (5) design (4) fingerprint (3) power (3) base (3) puf (3) system (2) reduct (2) leakag (2) optim (2)

Person: Gang Qu

DBLP DBLP: Qu:Gang

Contributed to:

DAC 20152015
DAC 20142014
DAC 20132013
DATE 20132013
DATE 20102010
DAC 20092009
DAC 20082008
DAC 20052005
DAC 20032003
DAC 20012001
DAC 20002000
DAC 19991999
DAC 19981998

Wrote 16 papers:

DAC-2015-DunbarQ
A practical circuit fingerprinting method utilizing observability don’t care conditions (CD, GQ), p. 6.
DAC-2014-GaoLQ #flexibility
A Highly Flexible Ring Oscillator PUF (MG, KL, GQ), p. 6.
DAC-2013-YinQ #security
Improving PUF security with regression-based distiller (CEDY, GQ), p. 6.
DATE-2013-YinQZ #design #implementation
Design and implementation of a group-based RO PUF (CEDY, GQ, QZ), pp. 416–421.
DATE-2010-YuZQB #behaviour #design #power management
Behavioral level dual-vth design for reduced leakage power with thermal awareness (JY, QZ, GQ, JB), pp. 1261–1266.
DAC-2009-GuQZ #design #information management
Information hiding for trusted system design (JG, GQ, QZ), pp. 698–701.
DAC-2008-BalkanQV #hybrid #network #parallel
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing (AOB, GQ, UV), pp. 435–440.
DAC-2005-YuanQ #reduction
Enhanced leakage reduction Technique by gate replacement (LY, GQ), pp. 47–50.
DAC-2003-HuaQB #energy #multi #reduction
Energy reduction techniques for multimedia applications with tolerance to deadline misses (SH, GQ, SSB), pp. 131–136.
DAC-2001-KoushanfarQ #hardware
Hardware Metering (FK, GQ), pp. 490–493.
DAC-2001-Qu #component #detection
Publicly Detectable Techniques for the Protection of Virtual Components (GQ), pp. 474–479.
DAC-2000-QuKUP #estimation
Function-level power estimation methodology for microprocessors (GQ, NK, KU, MP), pp. 810–813.
DAC-2000-QuP #constraints #using
Fingerprinting intellectual property using constraint-addition (GQ, MP), pp. 587–592.
DAC-1999-CaldwellCKMPQW #design #effectiveness
Effective Iterative Techniques for Fingerprinting Design IP (AEC, HJC, ABK, SM, MP, GQ, JLW), pp. 843–848.
DAC-1999-QuWP #problem
Optimization-Intensive Watermarking Techniques for Decision Problems (GQ, JLW, MP), pp. 33–36.
DAC-1998-HongKQPS #optimisation
Power Optimization of Variable Voltage Core-Based Systems (IH, DK, GQ, MP, MBS), pp. 176–181.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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