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Travelled to:
1 × France
1 × USA
Collaborated with:
P.Gaillardon M.H.B.Jamaa P.Morel F.Clermidy I.O'Connor E.Beigné A.Valentian B.Giraud O.Thomas T.Benoist Y.Thonnart S.Bernard G.Moritz O.Billoint Y.Maneglia P.Flatresse F.Abouzeid B.Pelloux-Prayer A.Grover S.Clerc P.Roche J.L.Coz S.Engels R.Wilson
Talks about:
architectur (1) silicon (1) voltag (1) toward (1) design (1) deplet (1) ultra (1) insul (1) fulli (1) wide (1)

Person: Jean-Philippe Noël

DBLP DBLP: No=euml=l:Jean=Philippe

Contributed to:

DATE 20132013
DAC 20112011

Wrote 2 papers:

Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs (EB, AV, BG, OT, TB, YT, SB, GM, OB, YM, PF, JPN, FA, BPP, AG, SC, PR, JLC, SE, RW), pp. 613–618.
DAC-2011-GaillardonBMNCO #3d #architecture #question #towards
Can we go towards true 3-D architectures? (PEG, MHBJ, PHM, JPN, FC, IO), pp. 282–283.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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