Travelled to:1 × France
2 × Germany
3 × USA
Collaborated with:S.Mitra J.Zhang H.P.Wong A.Lin A.Hazeghi H.Wei J.Deng S.Bobba G.D.Micheli
Talks about:nanotub (8) carbon (8) circuit (6) logic (3) imperfect (2) variat (2) design (2) immun (2) digit (2) vlsi (2)
Person: Nishant Patil
DBLP: Patil:Nishant
Contributed to:
2010
20102009200920082007Wrote 7 papers:
- DAC-2010-ZhangBPLWMM #correlation
- Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement (JZ, SB, NP, AL, HSPW, GDM, SM), pp. 889–892.
- DATE-2010-ZhangPLWM
- Carbon nanotube circuits: Living with imperfections and variations (JZ, NP, AL, HSPW, SM), pp. 1159–1164.
- DAC-2009-PatilLZWM #logic #using
- Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions (NP, AL, JZ, HSPW, SM), pp. 304–309.
- DAC-2009-ZhangPHM
- Carbon nanotube circuits in the presence of carbon nanotube density variations (JZ, NP, AH, SM), pp. 71–76.
- DATE-2009-MitraZPW #logic #using
- Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors (SM, JZ, NP, HW), pp. 436–441.
- DATE-2008-ZhangPM #design #guidelines #logic
- Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits (JZ, NP, SM), pp. 1009–1014.
- DAC-2007-PatilDWM #automation #design
- Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits (NP, JD, HSPW, SM), pp. 958–961.