BibSLEIGH corpus
BibSLEIGH tags
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
1 × USA
2 × Germany
Collaborated with:
R.Kapur A.Rubio B.Grundmann S.Kundu R.Vemu A.Jas J.A.Abraham S.Patil A.Nahir A.Ziv A.J.Hu M.Abramovici A.Camilleri B.Bentley H.Foster V.Bertacco S.Kapoor
Talks about:
silicon (2) technolog (1) processor (1) techniqu (1) platform (1) challeng (1) control (1) concurr (1) circuit (1) detect (1)

Person: Rajesh Galivanche

DBLP DBLP: Galivanche:Rajesh

Contributed to:

DAC 20102010
DATE 20082008
DATE 20072007
DATE 20032003

Wrote 4 papers:

DAC-2010-NahirZGHACBFBK #validation #verification
Bridging pre-silicon verification and post-silicon validation (AN, AZ, RG, AJH, MA, AC, BB, HF, VB, SK), pp. 94–95.
DATE-2008-VemuJAPG #concurrent #detection #fault #logic #low cost
A low-cost concurrent error detection technique for processor control logic (RV, AJ, JAA, SP, RG), pp. 897–902.
DATE-2007-GalivancheKR #testing
Testing in the year 2020 (RG, RK, AR), pp. 960–965.
DATE-2003-GrundmannGK #challenge #design #framework #platform
Circuit and Platform Design Challenges in Technologies beyond 90nm (BG, RG, SK), pp. 10044–10049.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.