BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
1 × Germany
3 × USA
Collaborated with:
H.Lan L.Sha G.R.Chin W.C.D.Jr. D.S.Boning A.S.Wong A.R.Neureuther E.Mintarno J.Skaf R.Zheng J.Velamala Y.Cao S.P.Boyd S.Mitra
Talks about:
rectangular (1) arbitrarili (1) statement (1) placement (1) algorithm (1) synthesi (1) substrat (1) univers (1) synthes (1) compact (1)

Person: Robert W. Dutton

DBLP DBLP: Dutton:Robert_W=

Contributed to:

DATE 20102010
DATE v2 20042004
DAC 19911991
DAC 19851985
DAC 19811981

Wrote 5 papers:

DATE-2010-MintarnoSZVCBDM #self
Optimized self-tuning for circuit aging (EM, JS, RZ, JV, YC, SPB, RWD, SM), pp. 586–591.
DATE-v2-2004-LanD #analysis #modelling #synthesis
Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs (HL, RWD), pp. 836–843.
DAC-1991-ChinDBWND
Linking TCAD to EDA — Benefits and Issues (GRC, WCDJ, DSB, ASW, ARN, RWD), pp. 573–578.
DAC-1985-ShaD #algorithm
An analytical algorithm for placement of arbitrarily sized rectangular blocks (LS, RWD), pp. 602–608.
DAC-1981-Dutton #automation #design #perspective #tool support
Position statement — tools for design automation from a university point of view (RWD), p. 333.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.