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Travelled to:
1 × France
2 × USA
Collaborated with:
N.Vijaykrishnan R.Das A.K.Mishra C.R.Das A.Nieuwoudt A.Gayasen Y.Massoud Y.Chen C.Wang S.Datta Y.Xie V.Narayanan
Talks about:
interconnect (2) architectur (1) transistor (1) reconfigur (1) hierarch (1) electron (1) nanotub (1) generat (1) design (1) carbon (1)

Person: Soumya Eachempati

DBLP DBLP: Eachempati:Soumya

Contributed to:

DAC 20112011
HPCA 20092009
DATE 20072007

Wrote 3 papers:

DAC-2011-ChenEWDXN #array #automation #configuration management
Automated mapping for reconfigurable single-electron transistor arrays (YCC, SE, CYW, SD, YX, VN), pp. 878–883.
HPCA-2009-DasEMVD #design #evaluation
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs (RD, SE, AKM, NV, CRD), pp. 175–186.
DATE-2007-EachempatiNGVM #architecture
Assessing carbon nanotube bundle interconnect for future FPGA architectures (SE, AN, AG, NV, YM), pp. 307–312.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.