Travelled to:1 × France
7 × USA
Collaborated with:A.Nieuwoudt J.White J.Kawa T.Ragheb N.Vijaykrishnan D.MacMillen S.S.Majors T.Bustami S.Eachempati A.Gayasen M.Kamon N.A.Marques L.M.Silveira M.Mondal A.J.Ricketts S.Kirolos G.M.Link
Talks about:interconnect (3) integr (3) induct (3) approach (2) circuit (2) analysi (2) optim (2) model (2) minim (2) architectur (1)
Person: Yehia Massoud
DBLP: Massoud:Yehia
Contributed to:
2008
2007200620052002200119991998Wrote 9 papers:
- DAC-2008-NieuwoudtKM #automation #configuration management #design #network
- Automated design of tunable impedance matching networks for reconfigurable wireless applications (AN, JK, YM), pp. 498–503.
- DATE-2007-EachempatiNGVM #architecture
- Assessing carbon nanotube bundle interconnect for future FPGA architectures (SE, AN, AG, NV, YM), pp. 307–312.
- DATE-2007-MondalRKRLVM #3d #robust
- Thermally robust clocking schemes for 3D integrated circuits (MM, AJR, SK, TR, GML, NV, YM), pp. 1206–1211.
- DAC-2006-NieuwoudtRM #named #optimisation #synthesis
- SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers (AN, TR, YM), pp. 879–884.
- DAC-2005-NieuwoudtM #approach #multi #optimisation
- Multi-level approach for integrated spiral inductor optimization (AN, YM), pp. 648–651.
- DAC-2002-MassoudW #approach
- Improving the generality of the fictitious magnetic charge approach to computing inductances in the presence of permeable materials (YM, JW), pp. 552–555.
- DAC-2001-MassoudKMW #analysis #difference #induction #modelling
- Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk (YM, JK, DM, JW), pp. 804–809.
- DAC-1999-KamonMMSW #3d #analysis #modelling
- Interconnect Analysis: From 3-D Structures to Circuit Models (MK, NAM, YM, LMS, JW), pp. 910–914.
- DAC-1998-MassoudMBW #layout
- Layout Techniques for Minimizing On-Chip Interconnect Self Inductance (YM, SSM, TB, JW), pp. 566–571.