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Travelled to:
1 × Denmark
1 × France
1 × Israel
4 × USA
Collaborated with:
G.D.Hachtel F.Somenzi E.Macii C.D.Kloos S.Manne R.I.Bahar M.Poncino R.K.Brayton A.L.Sangiovanni-Vincentelli A.Aziz S.Cheng S.A.Edwards S.P.Khatri Y.Kukimoto S.Qadeer R.K.Ranjan S.Sarwary T.R.Shiple G.Swamy T.Villa
Talks about:
state (3) automat (2) system (2) machin (2) model (2) finit (2) check (2) probabilist (1) increment (1) algorithm (1)

Person: Abelardo Pardo

DBLP DBLP: Pardo:Abelardo

Contributed to:

SIGITE 20052005
ITiCSE 20022002
DAC 19981998
CAV 19971997
CAV 19961996
DAC 19951995
DAC 19941994
EDAC-ETC-EUROASIC 19941994

Wrote 8 papers:

SIGITE-2005-PardoK #interactive #operating system
Deploying interactive e-labs for a course on operating systems (AP, CDK), pp. 71–78.
ITiCSE-2002-Pardo #automation #framework #multi
A multi-agent platform for automatic assignment management (AP), pp. 60–64.
DAC-1998-PardoH #incremental #model checking #using
Incremental CTL Model Checking Using BDD Subsetting (AP, GDH), pp. 457–462.
CAV-1997-PardoH #abstraction #automation #calculus #model checking #μ-calculus
Automatic Abstraction Techniques for Propositional μ-calculus Model Checking (AP, GDH), pp. 12–23.
CAV-1996-BraytonHSSACEKKPQRSSSV #named #synthesis #verification
VIS: A System for Verification and Synthesis (RKB, GDH, ALSV, FS, AA, STC, SAE, SPK, YK, AP, SQ, RKR, SS, TRS, GS, TV), pp. 428–432.
DAC-1995-MannePBHSMP
Computing the Maximum Power Cycles of a Sequential Circuit (SM, AP, RIB, GDH, FS, EM, MP), pp. 23–28.
DAC-1994-HachtelMPS #analysis #finite #probability #scalability #state machine
Probabilistic Analysis of Large Finite State Machines (GDH, EM, AP, FS), pp. 270–275.
EDAC-1994-HachtelMPS #algorithm #finite #state machine
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine (GDH, EM, AP, FS), pp. 214–218.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.