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Travelled to:
3 × France
5 × Germany
8 × USA
Collaborated with:
N.Jayakumar R.Garg C.Duan A.Mandal B.J.LaMeres P.K.Lin R.N.Mahapatra C.Nagpal R.Kumar K.Gulati V.H.C.Calle N.Saluja R.K.Brayton A.L.Sangiovanni-Vincentelli K.C.Bollapalli L.B.Kish C.Zhu G.Mallarapu S.Dhar G.Choi B.Gamache A.Mehrotra R.H.J.M.Otten A.Narayan S.C.Krishnan K.L.McMillan G.D.Hachtel F.Somenzi A.Aziz S.Cheng S.A.Edwards Y.Kukimoto A.Pardo S.Qadeer R.K.Ranjan S.Sarwary T.R.Shiple G.Swamy T.Villa
Talks about:
design (7) chip (6) base (5) approach (4) use (4) transmiss (3) crosstalk (3) logic (3) digit (3) subthreshold (2)

Person: Sunil P. Khatri

DBLP DBLP: Khatri:Sunil_P=

Contributed to:

DATE 20132013
DAC 20122012
DATE 20122012
DATE 20102010
DAC 20082008
DATE 20082008
DATE 20072007
DAC 20062006
DATE 20062006
DAC 20052005
DATE 20052005
DAC 20042004
DATE v2 20042004
DAC 19991999
CAV 19961996
DAC 19961996

Wrote 25 papers:

DATE-2013-KumarK #3d
Crosstalk avoidance codes for 3D VLSI (RK, SPK), pp. 1673–1678.
Exploring topologies for source-synchronous ring-based network-on-chip (AM, SPK, RNM), pp. 1026–1031.
DAC-2012-LinK #comprehension #logic #search-based #synthesis
Application of logic synthesis to the understanding and cure of genetic diseases (PCKL, SPK), pp. 734–740.
DAC-2012-LinMK #logic #satisfiability #using
Boolean satisfiability using noise based logic (PCKL, AM, SPK), pp. 1260–1261.
DATE-2012-MandalKM #design #performance
A fast, source-synchronous ring-based network-on-chip design (AM, SPK, RNM), pp. 1489–1494.
DATE-2010-BollapalliKK #implementation #logic
Implementing digital logic with sinusoidal supplies (KCB, SPK, LBK), pp. 315–318.
DAC-2008-DuanZK #design
Forbidden transition free crosstalk avoidance CODEC design (CD, CZ, SPK), pp. 986–991.
DAC-2008-GargNK #design #performance
A fast, analytical estimator for the SEU-induced pulse width in combinational designs (RG, CN, SPK), pp. 918–923.
DAC-2008-GulatiK #fault #simulation #towards #using
Towards acceleration of fault simulation using graphics processing units (KG, SPK), pp. 822–827.
DATE-2008-CorderoK #using
Clock Distribution Scheme using Coplanar Transmission Lines (VHCC, SPK), pp. 985–990.
DATE-2008-DuanK #energy #performance
Energy Efficient and High Speed On-Chip Ternary Bus (CD, SPK), pp. 515–518.
A Single-supply True Voltage Level Shifter (RG, GM, SPK), pp. 979–984.
DATE-2008-NagpalGK #approach #design #using
A Delay-efficient Radiation-hard Digital Design Approach Using CWSP Elements (CN, RG, SPK), pp. 354–359.
DATE-2007-JayakumarK #algorithm
An algorithm to minimize leakage through simultaneous input vector control and circuit modification (NJ, SPK), pp. 618–623.
DAC-2006-GargJKC #approach #design
A design approach for radiation-hard digital electronics (RG, NJ, SPK, GC), pp. 773–778.
DAC-2006-JayakumarGGK #approach #design
A PLA based asynchronous micropipelining approach for subthreshold circuit design (NJ, RG, BG, SPK), pp. 419–424.
DATE-2006-LaMeresK #encoding #induction
Bus stuttering: an encoding technique to reduce inductive noise in off-chip data transmission (BJL, SPK), pp. 522–527.
DAC-2005-JayakumarDK #monitoring #self
A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents (NJ, SD, SPK), pp. 43–46.
DAC-2005-JayakumarK #approach #design
A variation tolerant subthreshold design approach (NJ, SPK), pp. 716–719.
DATE-2005-LaMeresK #encoding #induction
Encoding-Based Minimization of Inductive Cross-Talk for Off-Chip Data Transmission (BJL, SPK), pp. 1318–1323.
DAC-2004-SalujaK #algorithm #approximate #robust
A robust algorithm for approximate compatible observability don’t care (CODC) computation (NS, SPK), pp. 422–427.
Exploiting Crosstalk to Speed up On-Chip Buse (CD, SPK), pp. 778–783.
DAC-1999-KhatriMBOS #layout #novel
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications (SPK, AM, RKB, RHJMO, ALSV), pp. 491–496.
CAV-1996-BraytonHSSACEKKPQRSSSV #named #synthesis #verification
VIS: A System for Verification and Synthesis (RKB, GDH, ALSV, FS, AA, STC, SAE, SPK, YK, AP, SQ, RKR, SS, TRS, GS, TV), pp. 428–432.
DAC-1996-KhatriNKMBS #automaton #nondeterminism
Engineering Change in a Non-Deterministic FSM Setting (SPK, AN, SCK, KLM, RKB, ALSV), pp. 451–456.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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