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Travelled to:
1 × Brazil
1 × Canada
1 × Hungary
2 × United Kingdom
4 × Germany
9 × USA
Collaborated with:
∅ O.Tardieu J.Zeng N.Vasudevan C.Soviani M.Buss C.L.Conway D.Brand V.C.Sreedhar E.A.Lee I.Hadzic C.Mitchell S.Jan P.d.Dios R.Townsend M.A.Kim J.Dolby K.S.Namjoshi D.Dams B.Yao D.G.Waddington R.K.Brayton G.D.Hachtel A.L.Sangiovanni-Vincentelli F.Somenzi A.Aziz S.Cheng S.P.Khatri Y.Kukimoto A.Pardo S.Qadeer R.K.Ranjan S.Sarwary T.R.Shiple G.Swamy T.Villa
Talks about:
analysi (6) program (5) concurr (5) compil (4) synthesi (3) pointer (3) languag (3) generat (3) shim (3) code (3)

♂ Person: Stephen A. Edwards

DBLP DBLP: Edwards:Stephen_A=

Facilitated 1 volumes:

SLE 2009PrCo

Contributed to:

CC 20092009
SAC 20092009
DATE 20082008
PEPM 20082008
SAC 20082008
SAC 20082010
DAC 20072007
DAC 20062006
DATE 20062006
LCTES 20062006
LDTA 20062006
PEPM 20062006
CAV 20052005
DATE 20052005
SCAM 20052005
LCTES 20042004
DAC 20032003
DATE 20032003
DAC 20002000
CAV 19961996
CC 20172017

Wrote 22 papers:

CC-2009-VasudevanTDE #analysis #concurrent #source code
Compile-Time Analysis and Specialization of Clocks in Concurrent Programs (NV, OT, JD, SAE), pp. 48–62.
SAC-2009-VasudevanE #compilation #concurrent #manycore
Celling SHIM: compiling deterministic concurrency to a heterogeneous multicore (NV, SAE), pp. 1626–1631.
DATE-2008-EdwardsVT #compilation #concurrent #memory management #message passing #multi #programming #thread
Programming Shared Memory Multiprocessors with Deterministic Message-Passing Concurrency: Compiling SHIM to Pthreads (SAE, NV, OT), pp. 1498–1503.
PEPM-2008-EdwardsZ #concurrent #recursion
Static elaboration of recursion for concurrent software (SAE, JZ), pp. 71–80.
SAC-2008-BussBSE #analysis #flexibility #graph #pointer #using
Flexible pointer analysis using assign-fetch graphs (MB, DB, VCS, SAE), pp. 234–239.
SAC-PL-J-2008-BussBSE10 #analysis #debugging #novel #pointer
A novel analysis space for pointer analysis and its application for bug finding (MB, DB, VCS, SAE), pp. 921–942.
DAC-2007-EdwardsL #precise
The Case for the Precision Timed (PRET) Machine (SAE, EAL), pp. 264–265.
DAC-2006-SovianiHE #pipes and filters #synthesis
Synthesis of high-performance packet processing pipelines (CS, IH, SAE), pp. 679–682.
DATE-2006-SovianiTE #composition #optimisation
Optimizing sequential cycles through Shannon decomposition and retiming (CS, OT, SAE), pp. 1085–1090.
LCTES-2006-EdwardsT #code generation #modelling #performance
Efficient code generation from SHIM models (SAE, OT), pp. 125–134.
LDTA-2006-ZengME #data flow #domain-specific language #generative
A Domain-Specific Language for Generating Dataflow Analyzers (JZ, CM, SAE), pp. 103–119.
PEPM-2006-Edwards #fixpoint #simulation #using
Using program specialization to speed SystemC fixed-point simulation (SAE), pp. 21–28.
CAV-2005-ConwayNDE #algorithm #analysis #incremental #interprocedural #safety
Incremental Algorithms for Inter-procedural Analysis of Safety Properties (CLC, KSN, DD, SAE), pp. 449–461.
DATE-2005-Edwards #challenge #hardware #synthesis
The Challenges of Hardware Synthesis from C-Like Languages (SAE), pp. 66–67.
SCAM-2005-BussEYW #analysis #pointer #text-to-text
Pointer Analysis for Source-to-Source Transformations (MB, SAE, BY, DGW), pp. 139–150.
LCTES-2004-ConwayE #domain-specific language #named
NDL: a domain-specific language for device drivers (CLC, SAE), pp. 30–36.
LCTES-2004-ZengSE #concurrent #dependence #generative #graph #performance
Generating fast code from concurrent program dependence graphs (JZ, CS, SAE), pp. 175–181.
DAC-2003-Edwards
Making cyclic circuits acyclic (SAE), pp. 159–162.
DATE-2003-JanDE #case study #development #embedded #encryption #migration #network
Porting a Network Cryptographic Service to the RMC2000: A Case Study in Embedded Software Development (SJ, PdD, SAE), pp. 20150–20157.
DAC-2000-Edwards #compilation
Compiling Esterel into sequential code (SAE), pp. 322–327.
CAV-1996-BraytonHSSACEKKPQRSSSV #named #synthesis #verification
VIS: A System for Verification and Synthesis (RKB, GDH, ALSV, FS, AA, STC, SAE, SPK, YK, AP, SQ, RKR, SS, TRS, GS, TV), pp. 428–432.
CC-2017-TownsendKE #data flow #functional #pipes and filters #source code
From functional programs to pipelined dataflow circuits (RT, MAK, SAE), pp. 76–86.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.