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Travelled to:
11 × USA
Collaborated with:
V.D.Agrawal J.Villoldo S.Bose W.J.Dally M.A.Breuer D.Bhattacharya R.Tutundjian K.Cheng N.N.Biswas M.K.Reddy S.M.Reddy M.J.Meyer R.G.Pfister S.C.Seth Y.Li S.Mao S.F.Midkiff S.K.Das S.K.Sen R.Jayaram W.N.Li A.Lim S.Sahni A.K.Ezzat W.C.Fischer H.V.Jagadish A.S.Krishnakumar
Talks about:
circuit (6) generat (5) test (5) sequenti (3) network (3) fault (3) algorithm (2) hardwar (2) concurr (2) system (2)

Person: Prathima Agrawal

DBLP DBLP: Agrawal:Prathima

Contributed to:

CASE 20082008
HPDC 19971997
DAC 19931993
HPDC 19931993
DAC 19921992
DAC 19891989
DAC 19881988
DAC 19871987
DAC 19851985
DAC 19841984
DAC 19811981
DAC 19771977

Wrote 15 papers:

CASE-2008-LiMAM #multi #network #scheduling
Low-complexity Channel-Aware Scheduling for multichannel wireless local area networks (YL, SM, PA, SFM), pp. 133–138.
HPDC-1997-DasSJA #mobile #network
Cellular Mobile Networks (SKD, SKS, RJ, PA), pp. 254–263.
DAC-1993-AgrawalAV #distributed #generative #testing
Sequential Circuit Test Generation on a Distributed System (PA, VDA, JV), pp. 107–111.
HPDC-1993-AgrawalAV #generative #network
Test Pattern Generation for Sequential Circuits on a Network of Workstations (PA, VDA, JV), pp. 114–120.
DAC-1992-BhattacharyaAA #fault #generative #testing #using
Delay Fault Test Generation for Scan/Hold Circuits Using Boolean Expressions (DB, PA, VDA), pp. 159–164.
DAC-1992-BoseA #concurrent #fault #logic #memory management #message passing #multi #simulation
Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers (SB, PA), pp. 332–335.
DAC-1992-LiLAS #implementation #on the #problem
On the Circuit Implementation Problem (WNL, AL, PA, SS), pp. 478–483.
DAC-1989-AgrawalTD #algorithm #hardware #logic
Algorithms for Accuracy Enhancement in a Hardware Logic Simulator (PA, RT, WJD), pp. 645–648.
DAC-1988-AgrawalCA #concurrent #contest #generative #named
Contest: A Concurrent Test Generator for Sequential Circuits (VDA, KTC, PA), pp. 84–89.
DAC-1987-AgrawalDEFJK #architecture #design #hardware
Architecture and Design of the MARS Hardware Accelerator (PA, WJD, AKE, WCF, HVJ, ASK), pp. 101–107.
DAC-1985-AgrawalAB #multi
Multiple output minimization (PA, VDA, NNB), pp. 674–680.
DAC-1985-ReddyRA #generative #testing
Transistor level test generation for MOS circuits (MKR, SMR, PA), pp. 825–828.
DAC-1984-MeyerAP #automaton #design
A VLSI FSM design system (MJM, PA, RGP), pp. 434–440.
DAC-1981-AgrawalSA #fault #quality
LSI product quality and fault coverage (VDA, SCS, PA), pp. 196–203.
DAC-1977-AgarwalB #algorithm #aspect-oriented
Some theoretical aspects of algorithmic routing (PA, MAB), pp. 23–31.

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