BibSLEIGH — Melvin_A

Travelled to:

17 × USA
2 × Germany
4 × France

Collaborated with:

S.K.Gupta ∅ I.Parulkar M.Abramovici Y.Gao K.Lee C.Njinda Z.A.Syed X.Zhu S.U.Chowdhury D.Chyan M.S.Chandrasekhar A.C.Parker P.Agrawal A.D.Friedman Y.Wang M.Mirza-Aghatabar T.Hsieh L.Chen S.Lin R.Srinivasan A.Iosupovicz C.King A.E.Gamal H.W.Carter K.Kumar S.Nazarian M.Pedram

Talks about:

placement (5) design (5) test (5) bist (5) algorithm (4) circuit (4) system (4) yield (4) fault (4) area (4)

Person: Melvin A. Breuer

DBLP: Breuer:Melvin_A=

Contributed to:

2013

2010

2007

2006

2001

1998

1996

1995

1994

1993

1992

1985

1983

1982

1981

1980

1979

1977

1974

1966

Wrote 30 papers:

DATE-2013-GaoBW #paradigm #performance: A new paradigm for trading off yield, area and performance to enhance performance per wafer (YG, MAB, YW), pp. 1753–1758.
DATE-2013-GaoGB #fault tolerance #scheduling #using: Using explicit output comparisons for fault tolerant scheduling (FTS) on modern high-performance processors (YG, SKG, MAB), pp. 927–932.
DAC-2010-Breuer #bound #hardware: Hardware that produces bounded rather than exact results (MAB), pp. 871–876.
DATE-2010-Mirza-AghatabarBG #algorithm #pipes and filters: Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules (MMA, MAB, SKG), pp. 1249–1254.
DATE-2007-HsiehLB #detection #fault #reduction: Reduction of detected acceptable faults for yield improvement via error-tolerance (TYH, KJL, MAB), pp. 1599–1604.
DATE-DF-2006-NazarianPGB #named #set #statistics: STAX: statistical crosstalk target set compaction (SN, MP, SKG, MAB), pp. 172–177.
DAC-2001-ChenGB: A New Gate Delay Model for Simultaneous Switching and Its Applications (LCC, SKG, MAB), pp. 289–294.
DAC-1998-ParulkarGB #behaviour: Introducing Redundant Computations in a Behavior for Reducing BIST Resources (IP, SKG, MAB), pp. 548–553.
DATE-1998-ParulkarGB #scheduling: Scheduling and Module Assignment for Reducing Bist Resources (IP, SKG, MAB), pp. 66–73.
DAC-1996-ParulkarGB #bound #data flow #graph: Lower Bounds on Test Resources for Scheduled Data Flow Graphs (IP, SKG, MAB), pp. 143–148.
DAC-1995-ParulkarGB #design: Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead (IP, SKG, MAB), pp. 395–401.
DAC-1994-ParulkarBN #representation: Extraction of a High-level structural Representation from Circuit Descriptions with Applications to DFT/BIST (IP, MAB, CN), pp. 345–356.
EDAC-1994-LinGB #generative #low cost #novel: A Low Cost BIST Methodology and Associated Novel Test Pattern Generator (SPL, SKG, MAB), pp. 106–112.
DAC-1993-SrinivasanGB #clustering #performance #pseudo #testing: An Efficient Partitioning Strategy for Pseudo-Exhaustive Testing (RS, SKG, MAB), pp. 242–248.
DAC-1992-LeeNB #generative #named #testing: SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits (KJL, CN, MAB), pp. 26–29.
DAC-1985-BreuerZ #knowledge base: A knowledge based system for selecting a test methodology for a PLA (MAB, XaZ), pp. 259–265.
DAC-1985-ChowdhuryB: The construction of minimal area power and ground nets for VLSI circuits (SUC, MAB), pp. 794–797.
DAC-1983-ChyanB #algorithm #array: A placement algorithm for array processors (DJC, MAB), pp. 182–188.
DAC-1983-IosupoviczKB: A module interchange placement machine (AI, CK, MAB), pp. 171–174.
DAC-1982-Breuer #automation #design #overview #state of the art: A survey of the state-of-the-art of design automation an invited presentation (MAB), p. 1.
DAC-1982-ChandrasekharB: Optimum placement of two rectangular blocks (MSC, MAB), pp. 879–886.
DAC-1982-SyedGB #on the: On routing for custom integrated circuits (ZAS, AEG, MAB), pp. 887–893.
DAC-1981-BreuerP #roadmap #simulation: Digital system simulation: Current status and future trends or darwin’s theory of simulation (MAB, ACP), pp. 269–275.
DAC-1980-AbramoviciB #analysis #fault: Fault diagnosis based on effect-cause analysis: An introduction (MA, MAB), pp. 69–76.
DAC-1979-CarterBS #incremental: Incremental processing applied to Steinberg’s placement procedure (HWC, MAB, ZAS), pp. 26–31.
DAC-1977-AbramoviciBK #concurrent #fault #functional #modelling #simulation: Concurrent fault simulation and functional level modeling (MA, MAB, KK), pp. 128–137.
DAC-1977-AgarwalB #algorithm #aspect-oriented: Some theoretical aspects of algorithmic routing (PA, MAB), pp. 23–31.
DAC-1977-Breuer #algorithm: A class of min-cut placement algorithms (MAB), pp. 284–290.
DAC-1974-BreuerF #automation #concept #design: Initial design concepts for an advanced design automation system (MAB, ADF), pp. 366–371.
SHARE-1966-Breuer #automation #design #integer #programming: The application of integer programming in design automation (MAB).