BibSLEIGH — Ernest_S

Travelled to:

1 × France
2 × Germany
8 × USA

Collaborated with:

Q.Yu X.Xiong M.Shih S.Lin M.A.B.Jackson C.Cheng X.Hong J.Huang J.M.Wang R.Tsay P.Chen D.Wang T.Mitsuhashi A.Srinivasan M.Marek-Sadowska C.Hsu W.W.Dai M.Sato S.Tsukiyama I.Shirakawa T.Xue L.Zhang W.Yu H.Zhu A.Deutsch G.A.Katopis D.M.Dreps

Talks about:

algorithm (6) perform (6) driven (6) effici (5) interconnect (3) optim (3) rout (3) cell (3) base (3) placement (2)

Person: Ernest S. Kuh

DBLP: Kuh:Ernest_S=

Contributed to:

2008

2001

2000

1999

1998

1993

1992

1990

1989

1988

1987

1981

Wrote 21 papers:

DAC-2008-ZhangYZDKDKC #optimisation #power management #using: Low power passive equalizer optimization using tritonic step response (LZ, WY, HZ, AD, GAK, DMD, ESK, CKC), pp. 570–573.
DATE-2001-YuK #algorithm #distributed #performance: Explicit formulas and efficient algorithm for moment computation of coupled RC trees with lumped and distributed elements (QY, ESK), pp. 445–450.
DAC-2000-ChenK #approximate #linear #programming: Floorplan sizing by linear programming approximation (PC, ESK), pp. 468–471.
DAC-2000-YuWK #algorithm #network #order #reduction: Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks (QY, JMW, ESK), pp. 520–525.
DATE-1999-WangYK #distributed #estimation: Coupled Noise Estimation for Distributed RC Interconnect Model (JMW, QY, ESK), pp. 664–668.
DATE-1998-WangK #reduction: A Performance-Driven MCM Router with Special Consideration of Crosstalk Reduction (DW, ESK), pp. 466–470.
DAC-1993-HongXKCH #algorithm: Performance-Driven Steiner Tree Algorithm for Global Routing (XH, TX, ESK, CKC, JH), pp. 177–181.
DAC-1993-HuangHCK #algorithm #performance: An Efficient Timing-Driven Global Routing Algorithm (JH, XH, CKC, ESK), pp. 596–600.
DAC-1993-ShihK #clustering #polynomial #programming: Quadratic Boolean Programming for Performance-Driven System Partitioning (MS, ESK), pp. 761–765.
DAC-1992-HongHCK #algorithm #named #performance: FARM: An Efficient Feed-Through Pin Assignment Algorithm (XH, JH, CKC, ESK), pp. 530–535.
DAC-1992-LinK #simulation: Transient Simulation of Lossy Interconnect (SL, ESK), pp. 81–86.
DAC-1992-MitsuhashiK #network #optimisation: Power and Ground Network Topology Optimization for Cell Based VLSIs (TM, ESK), pp. 524–529.
DAC-1992-ShihKT #clustering #multi: Performance-Driven System Partitioning on Multi-Chip Modules (MS, ESK, RST), pp. 53–56.
DAC-1990-JacksonSK: Clock Routing for High-Performance ICs (MABJ, AS, ESK), pp. 573–579.
DAC-1990-LinMK #design #optimisation #standard: Delay and Area Optimization in Standard-Cell Design (SL, MMS, ESK), pp. 349–352.
DAC-1989-JacksonK: Performance-driven Placement of Cell Based IC’s (MABJ, ESK), pp. 370–375.
DAC-1988-TsayKH #algorithm #named #performance: Proud: A Fast Sea-of-Gates Placement Algorithm (RST, ESK, CPH), pp. 318–323.
DAC-1988-XiongK #design #problem: The Constrained Via Minimization Problem for PCB and VLSI Design (XMX, ESK), pp. 573–578.
DAC-1987-DaiSK #layout #performance #representation: A Dynamic and Efficient Representation of Building-Block Layout (WWMD, MS, ESK), pp. 376–384.
DAC-1987-XiongK #named #performance: Nutcracker: An Efficient and Intelligent Channel Spacer (XMX, ESK), pp. 298–304.
DAC-1981-TsukiyamaKS #multi #on the #problem: On the layering problem of multilayer PWB wiring (ST, ESK, IS), pp. 738–745.