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Travelled to:
1 × USA
4 × France
6 × Germany
Collaborated with:
B.Becker A.G.Fowler P.Jovanovic P.K.Krause H.Fujiwara M.Sauer A.Czutro S.M.Reddy A.Paler S.J.Devitt K.Nemoto P.Engelke J.Schlöffel S.Reimer T.Schubert J.Jiang A.Czutro V.Izosimov P.Pop P.Eles Z.Peng
Talks about:
base (5) optim (4) fault (4) test (3) evolutionari (2) constraint (2) compress (2) quantum (2) longest (2) circuit (2)

Person: Ilia Polian

DBLP DBLP: Polian:Ilia

Contributed to:

DAC 20152015
DATE 20152015
DATE 20142014
DATE 20132013
DATE 20122012
DATE 20112011
DATE 20092009
DATE 20082008
DATE 20062006
DATE 20052005
DATE 20032003

Wrote 11 papers:

DAC-2015-PolianF #architecture #automation #challenge #design #quantum #scalability
Design automation challenges for scalable quantum architectures (IP, AGF), p. 6.
DATE-2015-JovanovicP #product line
Fault-based attacks on the Bel-T block cipher family (PJ, IP), pp. 601–604.
DATE-2014-PalerDNP #fault tolerance #quantum
Software-based Pauli tracking in fault-tolerant quantum circuits (AP, SJD, KN, IP), pp. 1–4.
DATE-2013-SauerRSPB #performance #satisfiability
Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths (MS, SR, TS, IP, BB), pp. 448–453.
DATE-2012-JiangSCBP #algorithm #constraints #generative #memory management #on the
On the optimality of K longest path generation algorithm under memory constraints (JJ, MS, AC, BB, IP), pp. 418–423.
DATE-2011-KrauseP #adaptation
Adaptive voltage over-scaling for resilient applications (PKK, IP), pp. 944–949.
DATE-2009-IzosimovPPEP #analysis #embedded #fault tolerance #optimisation
Analysis and optimization of fault-tolerant embedded systems with hardened processors (VI, IP, PP, PE, ZP), pp. 682–687.
DATE-2008-EngelkePSB #fault #industrial #simulation
Resistive Bridging Fault Simulation of Industrial Circuits (PE, IP, JS, BB), pp. 628–633.
DATE-2006-PolianF #constraints #functional #testing
Functional constraints vs. test compression in scan-based delay testing (IP, HF), pp. 1039–1044.
DATE-2005-PolianCB #optimisation
Evolutionary Optimization in Code-Based Test Compression (IP, AC, BB), pp. 1124–1129.
DATE-2003-PolianBR #markov #optimisation #pseudo #random
Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST (IP, BB, SMR), pp. 11184–11185.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.