Travelled to:
2 × Germany
3 × France
4 × USA
Collaborated with:
L.C.V.d.Santos J.L.v.Meerbergen A.H.Timmer H.Xue E.P.Huijbregts J.A.J.Leijten B.Mesman M.T.J.Strik J.T.J.v.Eijndhoven C.Di C.A.A.Pinto K.v.Eijk K.Kalafala S.R.Naidu R.H.J.M.Otten C.Visweswariah
Talks about:
code (3) constraint (2) schedul (2) perform (2) motion (2) driven (2) time (2) rout (2) high (2) dsp (2)
Person: Jochen A. G. Jess
DBLP: Jess:Jochen_A=_G=
Contributed to:
Wrote 11 papers:
- DAC-2003-JessKNOV #parametricity #predict #statistics
- Statistical timing for parametric yield prediction of digital integrated circuits (JAGJ, KK, SRN, RHJMO, CV), pp. 932–937.
- DATE-2001-PintoMEJ #constraints #scheduling
- Constraint satisfaction for storage files with Fifos or stacks during scheduling (CAAP, BM, KvE, JAGJ), p. 824.
- DAC-1999-SantosJ #order #performance
- A Reordering Technique for Efficient Code Motion (LCVdS, JAGJ), pp. 296–299.
- DATE-1999-SantosJ #equivalence #on the fly
- Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation (LCVdS, JAGJ), p. 609–?.
- DATE-1998-LeijtenMTJ #communication #multi #realtime
- Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor (JAJL, JLvM, AHT, JAGJ), pp. 125–131.
- DATE-1998-MesmanSTMJ #approach #constraints #pipes and filters
- A Constraint Driven Approach to Loop Pipelining and Register Binding (BM, MTJS, AHT, JLvM, JAGJ), pp. 377–383.
- EDTC-1997-LeijtenMTJ #architecture #data-driven #multi #named
- PROPHID: a data-driven multi-processor architecture for high-performance DSP (JAJL, JLvM, AHT, JAGJ), p. 611.
- DAC-1995-TimmerSMJ #code generation #modelling #scheduling
- Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores (AHT, MTJS, JLvM, JAGJ), pp. 593–598.
- DAC-1994-XueHJ
- Routing for Manufacturability (HX, EPH, JAGJ), pp. 402–406.
- EDAC-1994-HuijbregtsEJ #design #on the
- On Design Rule Correct Maze Routing (EPH, JTJvE, JAGJ), pp. 407–411.
- EDAC-1994-XueDJ #analysis #fault #float #probability
- Probability Analysis for CMOS Floating Gate Faults (HX, CD, JAGJ), pp. 443–448.