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Travelled to:
1 × Canada
1 × Germany
11 × USA
3 × France
Collaborated with:
A.B.Kahng D.Sylvester A.Nicolau S.Shah A.A.Kagalwalla R.S.Ghaida P.Sharma F.Heng N.Dutt N.D.Dutt Y.Kim J.Yang A.BanaiyanMofrad M.Gottscho Y.Badr A.Torres Y.Chen D.S.Doermann D.DeMenthon L.Lai V.Chandra R.C.Aitken L.A.D.Bathen T.Chan J.Sartori R.Kumar A.Kasibhatla S.Sarma N.Venkatasubramanian A.Nicolau L.Cheng C.J.Spanos K.Qian L.He L.Capodieci M.Shoushtari L.F.Wanner R.Balani S.Zahedi C.Apte M.B.Srivastava J.Henkel L.Bauer S.R.Nassif M.Shafique M.B.Tahoori N.Wehn
Talks about:
methodolog (4) awar (4) variabl (3) system (3) design (3) time (3) mask (3) cost (3) base (3) systemat (2)

Person: Puneet Gupta

DBLP DBLP: Gupta:Puneet

Contributed to:

DAC 20152015
DATE 20152015
DAC 20142014
DAC 20132013
DATE 20132013
DATE 20122012
DATE 20112011
DAC 20102010
DAC 20092009
DAC 20082008
DAC 20072007
DAC 20062006
DAC 20052005
DAC 20042004
DAC 20032003
ICPR v2 20022002

Wrote 23 papers:

DAC-2015-BadrTG #hybrid #synthesis
Mask assignment and synthesis of DSA-MP hybrid lithography for sub-7nm contacts/vias (YB, AT, PG), p. 6.
DAC-2015-KagalwallaG #effectiveness #modelling #reduction
Effective model-based mask fracturing for mask cost reduction (AAK, PG), p. 6.
DATE-2015-SarmaDGVN #paradigm #self
Cyberphysical-system-on-chip (CPSoC): a self-aware MPSoC paradigm with cross-layer virtual sensing and actuation (SS, NDD, PG, NV, AN), pp. 625–628.
DAC-2014-DuttGNBGS #memory management #multi
Multi-Layer Memory Resiliency (ND, PG, AN, AB, MG, MS), p. 6.
DAC-2014-GottschoBDNG #capacity #energy #fault tolerance #scalability
Power / Capacity Scaling: Energy Savings With Simple Fault-Tolerant Caches (MG, AB, ND, AN, PG), p. 6.
DAC-2013-HenkelBDGNSTW #lessons learnt #reliability #roadmap
Reliable on-chip systems in the nano-era: lessons learnt and future trends (JH, LB, ND, PG, SRN, MS, MBT, NW), p. 10.
DATE-2013-GhaidaG #design #development #multi #process
Role of design in multiple patterning: technology development, design enablement and process control (RSG, PG), pp. 314–319.
DATE-2013-LaiCAG #monitoring #named #online
SlackProbe: a low overhead in situ on-line timing slack monitoring methodology (LL, VC, RCA, PG), pp. 282–287.
DATE-2012-BathenDNG #memory management #named #variability
VaMV: Variability-aware Memory Virtualization (LADB, NDD, AN, PG), pp. 284–287.
DATE-2011-ChanSGK #on the
On the efficacy of NBTI mitigation techniques (TBC, JS, PG, RK), pp. 932–937.
DATE-2011-WannerBZAGS #embedded #scheduling #variability
Variability-aware duty cycle scheduling in long running embedded sensing systems (LFW, RB, SZ, CA, PG, MBS), pp. 131–136.
DAC-2010-GuptaKKS #benchmark #heuristic #metric #named
Eyecharts: constructive benchmarking of gate sizing heuristics (PG, ABK, AK, PS), pp. 597–602.
DAC-2009-ChengGSQH #modelling #variability
Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability (LC, PG, CJS, KQ, LH), pp. 104–109.
DAC-2008-GuptaK #bound
Bounded-lifetime integrated circuits (PG, ABK), pp. 347–348.
Line-End Shortening is Not Always a Failure (PG, ABK, YK, SS, DS), pp. 270–271.
DAC-2006-ShahGK #library #optimisation #reduction #standard
Standard cell library optimization for leakage reduction (SS, PG, ABK), pp. 983–986.
DAC-2005-GuptaKKS #analysis
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions (PG, ABK, YK, DS), pp. 365–368.
DAC-2004-CapodieciGKSY #design #towards
Toward a methodology for manufacturability-driven design rule exploration (LC, PG, ABK, DS, JY), pp. 311–316.
DAC-2004-GuptaH #towards
Toward a systematic-variation aware timing methodology (PG, FLH), pp. 321–326.
DAC-2004-GuptaKSS #effectiveness #runtime
Selective gate-length biasing for cost-effective runtime leakage control (PG, ABK, PS, DS), pp. 327–330.
DAC-2003-ChenGK #synthesis
Performance-impact limited area fill synthesis (YC, PG, ABK), pp. 22–27.
DAC-2003-GuptaKSY #off the shelf #tool support
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools (PG, ABK, DS, JY), pp. 16–21.
ICPR-v2-2002-GuptaDD #automation #classification #fault #feature model
Beam Search for Feature Selection in Automatic SVM Defect Classification (PG, DSD, DD), pp. 212–215.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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