BibSLEIGH — Mircea_R

Travelled to:

2 × Germany
3 × France
9 × USA

Collaborated with:

K.Skadron Y.Zhang S.Gurumurthi V.Mohan K.Sankaranarayanan M.Kabir M.M.Ziegler A.Panigrahi A.C.Cabe Z.Qi Z.Lu J.Lach R.Zhang B.H.Meyer K.Wang W.Huang D.Parikh X.Guo W.Burleson L.He W.Liao T.F.Abdelzaher C.W.S.IV A.Nigam R.J.Ribando M.Barcella K.Mazumdar S.Ghosh S.Velusamy Y.Li J.Wang S.N.Wooters T.N.Blalock B.H.Calhoun

Talks about:

design (5) power (5) thermal (4) model (4) voltag (3) system (3) leakag (3) temperatur (2) procrastin (2) techniqu (2)

Person: Mircea R. Stan

DBLP: Stan:Mircea_R=

Contributed to:

2015

2014

2011

2010

2008

2007

2006

2005

2004

2002

Wrote 19 papers:

DAC-2015-ZhangMMWSS #3d #design: A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-IC (RZ, KM, BHM, KW, KS, MRS), p. 6.
DAC-2014-GuoBS #modelling #self: Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques (XG, WB, MRS), p. 6.
DAC-2014-KabirS #hybrid: Computing with Hybrid CMOS/STO Circuits (MK, MRS), p. 6.
DAC-2014-WangMZSS: Walking Pads: Managing C4 Placement for Transient Voltage Noise Minimization (KW, BHM, RZ, MRS, KS), p. 6.
HPCA-2011-SmullenMNGS #energy #performance: Relaxing non-volatility for fast and energy-efficient STT-RAM caches (CWSI, VM, AN, SG, MRS), pp. 50–61.
DAC-2010-CabeQS #power management: Stacking SRAM banks for ultra low power standby mode operation (ACC, ZQ, MRS), pp. 699–704.
DAC-2010-QiWCWBCS #design: SRAM-based NBTI/PBTI sensor system design (ZQ, JW, ACC, SNW, TNB, BHC, MRS), pp. 849–852.
DATE-2010-MohanGS #memory management #named: FlashPower: A detailed power model for NAND flash memory (VM, SG, MRS), pp. 502–507.
DAC-2008-HuangSSRS #design #manycore #perspective: Many-core design from a thermal perspective (WH, MRS, KS, RJR, KS), pp. 746–749.
DAC-2007-ZhangGS #architecture #named #optimisation: SODA: Sensitivity Based Optimization of Disk Architecture (YZ, SG, MRS), pp. 865–870.
DATE-2006-LuZSLS #scheduling #set: Procrastinating voltage scheduling with discrete frequency sets (ZL, YZ, MRS, JL, KS), pp. 456–461.
DAC-2005-ZhangLLSS #realtime #scheduling: Optimal procrastinating voltage scheduling for hard real-time systems (YZ, ZL, JL, KS, MRS), pp. 905–908.
DAC-2004-HeLS #reduction: System level leakage reduction considering the interdependence of temperature and leakage (LH, WL, MRS), pp. 12–17.
DAC-2004-HuangSSSGV #design #modelling: Compact thermal modeling for temperature-aware design (WH, MRS, KS, KS, SG, SV), pp. 878–883.
DATE-v1-2004-LiPZSSS: State-Preserving vs. Non-State-Preserving Leakage Control in Caches (YL, DP, YZ, KS, MRS, KS), pp. 22–29.
DATE-v2-2004-ZieglerS #design #parallel: A Unified Design Space for Regular Parallel Prefix Adders (MMZ, MRS), pp. 1386–1387.
DATE-2002-StanP: The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits (MRS, AP), p. 1106.
HPCA-2002-ParikhSZBS #branch #predict: Power Issues Related to Branch Prediction (DP, KS, YZ, MB, MRS), pp. 233–244.
HPCA-2002-SkadronAS #locality #modelling: Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management (KS, TFA, MRS), pp. 17–28.