BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
11 × USA
2 × France
2 × Germany
Collaborated with:
D.Blaauw C.Visweswariah J.Xiong R.Panda A.Agarwal C.Oh N.Venkateswaran M.R.Becer P.Feldmann S.B.K.Vrudhula S.Sundareswaran M.Zhao K.Gala J.Wang I.N.Hajj D.Lee D.Sinha S.Sirichotiyakul R.Levy J.Chung J.A.Abraham Y.Shi P.A.Habitz K.Chopra H.Chang S.Narayan D.K.Beece Y.Liu S.Pant Y.Fu A.Glebov S.Gavrilov J.Zuo B.Young I.Algor J.G.Hemmett E.A.Foreman J.Leitzen G.Braca A.Dasgupta A.Grinshpon B.Orshav
Talks about:
analysi (11) statist (10) time (8) nois (6) circuit (4) use (4) comput (3) optim (3) model (3) delay (3)

Person: Vladimir Zolotov

DBLP DBLP: Zolotov:Vladimir

Contributed to:

DAC 20152015
DAC 20122012
DAC 20112011
DAC 20102010
DAC 20092009
DATE 20082008
DAC 20062006
DAC 20052005
DAC 20042004
DATE v2 20042004
DAC 20032003
DATE 20032003
DATE 20022002
DAC 20012001
DAC 20002000

Wrote 24 papers:

DAC-2015-ZolotovF #integer #linear #programming
Variation aware cross-talk aggressor alignment by mixed integer linear programming (VZ, PF), p. 6.
DAC-2012-SinhaVVXZ #concept #statistics
Reversible statistical max/min operation: concept and applications to timing (DS, CV, NV, JX, VZ), pp. 1067–1073.
DAC-2012-ZolotovSHFVXLV #analysis #statistics
Timing analysis with nonseparable statistical and deterministic variations (VZ, DS, JGH, EAF, CV, JX, JL, NV), pp. 1061–1066.
DAC-2011-ChungXZA #statistics #testing
Testability driven statistical path selection (JC, JX, VZ, JAA), pp. 417–422.
DAC-2010-BeeceXVZL #parametricity
Transistor sizing of custom high-performance digital circuits with parametric yield considerations (DKB, JX, CV, VZ, YL), pp. 781–786.
DAC-2009-XiongSZV #multi #process #statistics
Statistical multilayer process space coverage for at-speed test (JX, YS, VZ, CV), pp. 340–345.
DAC-2009-XiongVZ #correlation #ranking #statistics
Statistical ordering of correlated timing quantities and its application for path ranking (JX, CV, VZ), pp. 122–125.
DATE-2008-XiongZV #incremental
Incremental Criticality and Yield Gradients (JX, VZ, CV), pp. 1130–1135.
Optimal Margin Computation for At-Speed Test (JX, VZ, CV, PAH), pp. 622–627.
DAC-2006-XiongZVV #statistics
Criticality computation in parameterized statistical timing (JX, VZ, NV, CV), pp. 63–68.
DAC-2005-AgarwalCBZ #analysis #optimisation #statistics #using
Circuit optimization using statistical static timing analysis (AA, KC, DB, VZ), pp. 321–324.
DAC-2005-ChangZNV #analysis #parametricity #statistics
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions (HC, VZ, SN, CV), pp. 71–76.
DAC-2004-LeeZB #analysis #using
Static timing analysis using backward signal propagation (DL, VZ, DB), pp. 664–669.
DAC-2004-PantBZSP #analysis #approach #grid #power management #probability
A stochastic approach To power grid analysis (SP, DB, VZ, SS, RP), pp. 171–176.
DAC-2004-ZhaoFZSP #power management
Optimal placement of power supply pads and pins (MZ, YF, VZ, SS, RP), pp. 165–170.
DATE-v2-2004-GlebovGZOPB #analysis
False-Noise Analysis for Domino Circuits (AG, SG, VZ, CO, RP, MRB), pp. 784–789.
DAC-2003-AgarwalBZV #bound #refinement #statistics
Computation and Refinement of Statistical Bounds on Circuit Delay (AA, DB, VZ, SBKV), pp. 348–353.
DAC-2003-BecerBAPOZH #reduction
Post-route gate sizing for crosstalk noise reduction (MRB, DB, IA, RP, CO, VZ, INH), pp. 954–957.
DATE-2003-AgarwalBZV #analysis #bound #statistics #using
Statistical Timing Analysis Using Bounds (AA, DB, VZ, SBKV), pp. 10062–10067.
DATE-2002-BecerZBPH #analysis #using
Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model (MRB, VZ, DB, RP, INH), pp. 456–463.
DAC-2001-GalaBWZZ #analysis #design
Inductance 101: Analysis and Design Issues (KG, DB, JW, VZ, MZ), pp. 329–334.
DAC-2001-SirichotiyakulBOLZZ #modelling #worst-case
Driver Modeling and Alignment for Worst-Case Delay Noise (SS, DB, CO, RL, VZ, JZ), pp. 720–725.
DAC-2000-GalaZPYWB #analysis #modelling
On-chip inductance modeling and analysis (KG, VZ, RP, BY, JW, DB), pp. 63–68.
DAC-2000-LevyBBDGOOSZ #analysis #design #named
ClariNet: a noise analysis tool for deep submicron design (RL, DB, GB, AD, AG, CO, BO, SS, VZ), pp. 233–238.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.