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Travelled to:
1 × India
1 × Turkey
12 × USA
4 × France
6 × Germany
Collaborated with:
M.Lukasiewycz D.Goswami S.Steinhorst R.Schneider L.Thiele A.Masrur U.D.Bordoloi M.Kauer W.T.Ooi L.Ju A.Roychoudhury Y.Gu S.Künzli G.Färber S.A.Fahmy B.K.Huynh P.Mundhenk S.Narayanaswamy F.Sagstetter D.Gangadharan R.Zimmermann A.Annaswamy P.Milbredt C.Scharfenberger Y.Liu U.Schlichtmann Q.Rao C.Grünler M.Hammori G.Georgakos P.Seshadri H.P.Huynh T.Mitra B.Raman S.Dutta T.Erlebach M.Gries S.Andalam P.Waszecki D.Soudbakhsh A.M.Annaswamy C.J.Xue L.Zhang M.Glaß J.Teich R.Ernst M.Jersak H.Sarnowski M.Bekooij S.Naranayaswami L.Hedrich P.Kumar K.Lampka J.Chen A.Banerjee P.Eles Z.Peng A.Hagiescu P.Sampath P.V.V.Ganesan S.Ramesh H.Stähle A.Knoll M.Geier M.Becker D.Yunge B.Dietrich S.Ramesh C.Buckl N.Chang S.Park Y.Kim P.Leteinturier H.Adlkofer M.Wolf A.Bouard W.R.Harris S.Jha T.Peyrin A.Poschmann W.Chang S.Shreejith J.Oetjens N.Bannow M.Becker O.Bringmann A.Burger M.Chaari R.Drechsler W.Ecker K.Grüttner T.Kruse C.Kuznik H.M.Le M.Mauderer W.Müller D.Müller-Gritschneder F.Poppen H.Post S.Reiter W.Rosenstiel S.Roth A.v.Schwerin B.Tabacaru A.Viehl
Talks about:
system (13) analysi (10) architectur (9) design (9) schedul (8) automot (8) time (8) control (7) softwar (6) vehicl (6)

Person: Samarjit Chakraborty

DBLP DBLP: Chakraborty:Samarjit

Contributed to:

DAC 20152015
DATE 20152015
DAC 20142014
DATE 20142014
DAC 20132013
DATE 20132013
DAC 20122012
DATE 20122012
DAC 20112011
DATE 20112011
DAC 20102010
DATE 20102010
ICPR 20102010
CASE 20092009
DAC 20092009
DAC 20082008
DATE 20082008
DAC 20072007
DATE 20072007
DAC 20062006
DAC 20052005
DATE 20052005
DATE 20032003
DAC 20022002

Wrote 43 papers:

DAC-2015-MundhenkSLFC #analysis #architecture #model checking #probability #security #using
Security analysis of automotive architectures using probabilistic model checking (PM, SS, ML, SAF, SC), p. 6.
DATE-2015-KauerNLSC #geometry #optimisation #programming #using
Inductor optimization for active cell balancing using geometric programming (MK, SN, ML, SS, SC), pp. 281–284.
DATE-2015-MundhenkSLFC #authentication #lightweight #network
Lightweight authentication for secure automotive networks (PM, SS, ML, SAF, SC), pp. 285–288.
DAC-2014-OetjensBBBBCCDEGKKLM0MPPRRRSSTV #challenge #evaluation #prototype #research #safety #state of the art #using
Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges (JHO, NB, MB, OB, AB, MC, SC, RD, WE, KG, TK, CK, HML, MM, WM, DMG, FP, HP, SR, WR, SR, US, AvS, BAT, AV), p. 6.
DAC-2014-RaoGHC #artificial reality #design
Design Methods for Augmented Reality In-Vehicle Infotainment Systems (QR, CG, MH, SC), p. 6.
DAC-2014-SagstetterAWLSCK #architecture #framework #integration
Schedule Integration Framework for Time-Triggered Automotive Architectures (FS, SA, PW, ML, HS, SC, AK), p. 6.
DATE-2014-KauerSGCA #distributed #embedded #fault tolerance #synthesis #verification
Fault-tolerant control synthesis and verification of distributed embedded systems (MK, DS, DG, SC, AMA), pp. 1–6.
DATE-2014-NarayanaswamySLKC #architecture
Optimal dimensioning of active cell balancing architectures (SN, SS, ML, MK, SC), pp. 1–6.
DAC-2013-GeierBYDSGC #exclamation
Let’s put the car in your phone! (MG, MB, DY, BD, RS, DG, SC), p. 2.
DAC-2013-GeorgakosSSC #architecture #challenge #reliability
Reliability challenges for electric vehicles: from devices to architecture and systems software (GG, US, RS, SC), p. 9.
DAC-2013-GoswamiLKSMCR #development #modelling #verification
Model-based development and verification of control software for electric vehicles (DG, ML, MK, SS, AM, SC, SR), p. 9.
DAC-2013-KauerNSLCH #architecture #composition #concurrent
Modular system-level architecture for concurrent cell balancing (MK, SN, SS, ML, SC, LH), p. 10.
DAC-2013-LukasiewyczSASWCKMSFC #architecture #design
System architecture and software design for electric vehicles (ML, SS, SA, FS, PW, WC, MK, PM, SS, SAF, SC), p. 6.
DATE-2013-GangadharanCZ #platform #scheduling
Quality-aware media scheduling on MPSoC platforms (DG, SC, RZ), pp. 976–981.
DATE-2013-GoswamiMSXC #design #multi
Multirate controller design for resource- and schedule-constrained automotive ECUs (DG, AM, RS, CJX, SC), pp. 1123–1126.
DATE-2013-LukasiewyczSC #programming #using
Priority assignment for event-triggered systems using mathematical programming (ML, SS, SC), pp. 982–987.
DATE-2013-SagstetterLSWBHJPPC #architecture #challenge #design #hardware #security
Security challenges in automotive hardware/software architecture design (FS, ML, SS, MW, AB, WRH, SJ, TP, AP, SC), pp. 458–463.
DATE-2013-SchneiderZGMC #analysis #composition
Compositional analysis of switched ethernet topologies (RS, LZ, DG, AM, SC), pp. 1099–1104.
DAC-2012-KumarGCALT #approach #cyber-physical #hybrid #verification
A hybrid approach to cyber-physical systems verification (PK, DG, SC, AA, KL, LT), pp. 688–696.
DATE-2012-ChakrabortyLBFCPKLA #challenge #embedded
Embedded systems and software challenges in electric vehicles (SC, ML, CB, SAF, NC, SP, YK, PL, HA), pp. 424–429.
DATE-2012-GoswamiLSC #implementation
Time-triggered implementations of mixed-criticality automotive software (DG, ML, RS, SC), pp. 1227–1232.
DATE-2012-MasrurGCCAB #analysis #communication #cyber-physical #hybrid #protocol
Timing analysis of cyber-physical applications for hybrid communication protocols (AM, DG, SC, JJC, AA, AB), pp. 1233–1238.
DAC-2011-SchneiderGCBEP #on the #quantifier
On the quantification of sustainability and extensibility of FlexRay schedules (RS, DG, SC, UDB, PE, ZP), pp. 375–380.
DATE-2011-GoswamiSC #communication #cyber-physical #hybrid #protocol #re-engineering
Re-engineering cyber-physical control applications for hybrid communication protocols (DG, RS, SC), pp. 914–919.
DATE-2011-LukasiewyczCM #concept #network #scheduling
FlexRay switch scheduling — A networking concept for electric vehicles (ML, SC, PM), pp. 76–81.
DAC-2010-JuHRC #analysis #multi #source code
Timing analysis of esterel programs on general-purpose multiprocessors (LJ, BKH, AR, SC), pp. 48–51.
DATE-2010-MasrurCF
Constant-time admission control for Deadline Monotonic tasks (AM, SC, GF), pp. 220–225.
ICPR-2010-ScharfenbergerCF #artificial reality #predict #using
Driver Body-Height Prediction for an Ergonomically Optimized Ingress Using a Single Omnidirectional Camera (CS, SC, GF), pp. 298–301.
CASE-2009-GoswamiSBC
A DECOMSYS based tool-chain for analyzing FlexRay based automotive control applications (DG, PS, UDB, SC), pp. 403–408.
DAC-2009-BordoloiHCM #design #trade-off
Evaluating design trade-offs in customizable processors (UDB, HPH, SC, TM), pp. 244–249.
DAC-2009-GlassLTBC #analysis #architecture #design #encoding #hybrid #network
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis (MG, ML, JT, UDB, SC), pp. 43–46.
DAC-2009-JuHCR #analysis #source code
Context-sensitive timing analysis of Esterel programs (LJ, BKH, SC, AR), pp. 870–873.
DAC-2008-GuC #3d #game studies #interactive
Control theory-based DVS for interactive 3D games (YG, SC), pp. 740–745.
DATE-2008-ErnstJSBC #analysis #formal method #optimisation #performance
Formal Methods in System and MpSoC Performance Analysis and Optimisation (RE, MJ, HS, MB, SC).
DAC-2007-HagiescuBCSGR #analysis #network #performance
Performance Analysis of FlexRay-based ECU Networks (AH, UDB, SC, PS, PVVG, SR), pp. 284–289.
DAC-2007-RamanCOD #multi
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution (BR, SC, WTO, SD), pp. 738–743.
DATE-2007-JuCR #analysis #scheduling
Accounting for cache-related preemption delay in dynamic priority schedulability analysis (LJ, SC, AR), pp. 1623–1628.
DAC-2006-GuCO #game studies
Games are up for DVFS (YG, SC, WTO), pp. 598–603.
DAC-2005-LiuCO #approximate #design #multi
Approximate VCCs: a new characterization of multimedia workloads for system-level MpSoC design (YL, SC, WTO), pp. 248–253.
DATE-2005-ChakrabortyT #analysis #scheduling #streaming
A New Task Model for Streaming Applications and Its Schedulability Analysis (SC, LT), pp. 486–491.
DATE-2003-ChakrabortyKT #design #embedded #framework #platform
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs (SC, SK, LT), pp. 10190–10195.
DAC-2002-ChakrabortyEKT #embedded #realtime #scheduling
Schedulability of event-driven code blocks in real-time embedded systems (SC, TE, SK, LT), pp. 616–621.
DAC-2002-ThieleCGK #architecture #design #framework #trade-off
A framework for evaluating design tradeoffs in packet processing architectures (LT, SC, MG, SK), pp. 880–885.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.